Purpose
This is early communication to notify i.MX 8M Dual/8M QuadLite/8M Quad customers of a potential incorrect PCIe power supply configuration on certain NXP BSP Linux and Android versions.
Description
The PCIE_VPH power supply is selectable in software between 1.8V and 3.3V. When the PCIE_VPH supply is configured to operate at 3.3V, the 1.8V internal regulator (disabled by default) must be enabled to prevent overstress conditions on the PCIe PHY. If the 1.8V internal regulator is left disabled when the PCIE_VPH supply is configured to operate at 3.3V, it could potentially impact the product lifetime of the device.
Impact
•i.MX 8M Dual/8M QuadLite/8M Quad (other i.MX processors are not impacted)
•Only Impacts Linux/Android kernel versions earlier than L5.4.70_2.3.2 or Linux 5.10.9_1.0.0 releases
MITIGATION
•When the PCIE_VPH supply is configured to operate at 3.3V users need to enable the internal regulator by setting the IOMUXC_GPR_GPR14 and IOMUXC_GPR_GPR16 registers - PCIE1_VREG_BYPASS and PCIE2_VREG_BYPASS bit to 0.
•There are 3 software patches for each release. Software patch details in the Code Aurora Forum (CAF):
•For L5.4.70_2.3.2 patch release, the git log references are:
•MLK-25349-3 PCI: imx: clear vreg bypass when pcie vph voltage is 3v3
•MLK-25349-2 arm64: dts: imx8mq-evk: add one regulator used to power up pcie phy
•MLK-25349-1 dt-bindings: imx6q-pcie: add one regulator used to power up pcie phy
•
•The L5.4.70_2.3.2, LF_5.10 Q2 and later BSP releases correctly configure and enable the internal regulator by setting the IOMUXC_GPR_GPR14 and IOMUXC_GPR_GPR16 registers
MITIGATION
•The following branches of Linux/Android BSP releases contain the MLK-25349 patch. The patch is attached below for each respective release.
•Other branches which are not listed should try to apply the nearest Patch version patch. If a user encounters any conflicts in applying, they should back porting from below nearest patch release version below.
Documentation Change Description – 1 of 3 for Datasheet
Updated Datasheets and Reference Manual will be published to nxp.com.
Updated Hardware Design guide and Schematics have already been published on nxp.com.
Updated the descriptions of PCIE_VPH in the Datasheet Table 8, "Operating ranges"
Documentation Change Description – 2 of 3 for Reference Manual (RM)
Updated the description of field 12 "PCIE1_VREG_BYPASS" in 8.2.4.15 GPR14 General Purpose Register (IOMUXC_GPR_GPR14)
Documentation Change Description – 3 of 3 for RM
Updated the description of field 12 "PCIE2_VREG_BYPASS" in 8.2.4.17 GPR16 General Purpose Register (IOMUXC_GPR_GPR16)
REFERENCES
•i.MX 8M Dual / 8M QuadLite / 8M Quad Product Lifetime Usage
•i.MX 8M Dual / 8M QuadLite / 8M Quad Applications Processors Data Sheet for Industrial Products
•i.MX 8M Dual / 8M QuadLite / 8M Quad Applications Processors Data Sheet for Consumer Products
•i.MX 8MDQLQ Hardware Developer’s Guide
•i.MX 8M Dual/8M QuadLite/8M Quad Applications Processors Reference Manual