Hi community.
Our customer use Vybrid5R (SVF522R3K1CMK4) analog video input (VADCSE0) to terminal
enter the NTSC video signal to display an image on the TFT.
The detection of input signal use the registers of "havesignal" of Bit 0 , describe on Vybrid_Reference_Manual _-_ R_Series_ (Auto) _-_ Rev_6.pdf
of sect 61.6.22 Video Mode (VDEC_VIDMOD).
Would you please tell me the conditions to become havesignal is "0" when it becomes to video signal is fail.
Max input voltage and minimum input voltage.
Or Example) When input signal is ** V more voltage is applied, fail register rises.
The voltage input of up to ** V ~ ** V, the screen disturbed ,but does not rise fail to register.
Solved! Go to Solution.
Hello Takashi,
VDEC_VIDMOD handles a valid video signal, by the Standard Video signal output level is 1 Vpp 10% into 75 ohms. The following signal level applies to video signals like composite video signal that has sync information in it. The video inputs are generally designed to get this specified level input level at 3 dB or 6 dB accuracy (meaning 0.5-2V signal). The video signals that do not have sync signals (for example RGB component signals) use level of 0.7Vpp (same level as the picture part of normal video signal).
Have a great day,
Jaime
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Hello Takashi,
VDEC_VIDMOD handles a valid video signal, by the Standard Video signal output level is 1 Vpp 10% into 75 ohms. The following signal level applies to video signals like composite video signal that has sync information in it. The video inputs are generally designed to get this specified level input level at 3 dB or 6 dB accuracy (meaning 0.5-2V signal). The video signals that do not have sync signals (for example RGB component signals) use level of 0.7Vpp (same level as the picture part of normal video signal).
Have a great day,
Jaime
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Note: If this post answers your question, please click the Correct Answer button. Thank you!
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Helo Jaime
Thank you for your replay.
Would you please let me check.
I got the following answer, The No Signal of judgment conditions (conditions that bit of havesignal becomes 0⇒1)
"VDEC_VIDMOD handles a valid video signal, by the Standard Video signal output level is 1 Vpp 10% into 75 ohms."
Would fail should the decision depends on the voltage of the signal level?
Our customer decreases below noise applied experiments.
When testing application of the noise input in the NTSC signal, long noise periods (1 S, 1vp-p) not No-Signal ,but input short periods noise(10 mS, 1 Vp-p) increases the frequency of No-Signal phenomena.
Do you have any advice to me?
Also "10% of the video signal 1vpp valid video signal".
That exceed this range be flagged for fail-safe? (Voltage-dependent? ).
Customer software processing is only regularly monitor a bit of "havesignal"
When the bit is set, and is doing work to issue a blue screen of "No-Signal."
Failure of the determination conditions (bit set conditions) is I believe is dependent on the processing of internal IC processing.
Helo Jaime.
Would you please answer my question.
Thanks
Takahashi-san,
Please discuss further questions below thread, and close this one.
https://community.freescale.com/message/573437#573437
Best Regards,
Shigenobu