M4 Primary Emulation

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M4 Primary Emulation

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NXP Employee
NXP Employee

A question that comes up every once in a while is how to do an M4 boot on the tower system, which has an A5 primary part on it.

There is not a way to make the tower board chip into an M4 primary part as that is determined by the specific part number, so for a true M4 primary evaluation, a custom board would need to be created with the correct part number. However there are ways to get 99% of the way there and emulate how your system would work if it were an M4 primary part. The BootROM will behave the same regardless of which core it is executing on, so the real difference would come down to the application code.

The basic idea is to have the A5 code turn on the M4 core as one of its first instructions when it begins, and then have the A5 sit and wait for a signal (like a write to a specific byte of memory, or a hardware semaphore) from the M4 before the A5 would continue executing.

So it’s not exactly the same, but very close to how a M4 primary part would act. The changes required for the final system would be

1)    Removing the initial A5 code that kicks off the M4 and waits

2)    Removing the M4 code that sends the signal to the A5 to continue (to be replaced by the required write to the CCM_CCOWR register to start the secondary core)

3)    Changing the start address in the boot header of your code to point to the start of the M4 code instead of the start of the A5 code. Remember that the M4 start address in the boot header should be +1 since it's in thumb mode.


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3 Replies

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Contributor V

Hi Anthony,

Can you please list the specific part number(s) for the true M4 primary parts?

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NXP Employee
NXP Employee

It'd be MVF62NN151CMK40.

Also the Auto parts that have a "3" in the "core" field location in the part number: ie SVFx3xxxxxxx

http://cache.freescale.com/files/microcontrollers/doc/data_sheet/VYBRIDRSERIESEC.pdf?pspll=1

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Contributor III

I would just like to add to Anthony's comment.  To start the M4 from u-boot, for example, simply issue these two commands:

mw.l 0x4006e028 0x3f000485;

mw.l 0x4006b08c 0x00015a5a

If you kick off the core in code, you could use the following:

/* make sure address is odd for Thumb mode */

SRC->GPR[2] = address;

/* Enable M4 core */

CCM->CCOWR = 0x15a5a;




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