Hello,
My MQX application (M4 side) needs now more ram.
Code is located in SysRAM0 (0x3f000000) with 256kB, and TCMU seems to be only 32kB.
I would to allocate 192kB (0x3f000000 - 0x3f02ffff) for the code and 64kB ( 0x3f030000 - 0x3f03ffff) for data.
It seems data can't be accessed on SysRAM0.
How to share with llinux (A5 side) small amount (64 or 128kB) of DDR ?
Regards,
Emmanuel
You can also access 0x3F04_0000
This is shared RAM as you can see in the linker file:
define exported symbol __SHARED_RAM_START = 0x3f040000;
define exported symbol __SHARED_RAM_END = 0x3f04fff0;
the linker files are located in next paths:
C:\Freescale\Freescale_MQX_4_2\mqx\source\bsp\twrvf65gs10_m4\iar
C:\Freescale\Freescale_MQX_4_2\mqx\source\bsp\twrvf65gs10_a5\iar
Regards,
Carlos
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Hello Carlos,
SysRAM1 seems to be already used for libmcc exchanges, in fact I would like to increase data memory heap.
Where should I move DATA_BASE_ADDR_START segment to have more than 32kB heap memory?
ram.scf (for DS-5)
#! armcc -E --cpu Cortex-M4
#define CODE_BASE_ADDR_START 0x3f000000 ; SysRAM0
#define CODE_BASE_ADDR_END 0x3f03fff0
#define CODE_SIZE (CODE_BASE_ADDR_END - CODE_BASE_ADDR_START)
#define DATA_BASE_ADDR_START 0x3f800000 ; CM4 TCMU
#define DATA_BASE_ADDR_END 0x3f807ff0
#define DATA_SIZE (DATA_BASE_ADDR_END - DATA_BASE_ADDR_START)
#define DATA_SHARED_START 0x3f040000
#define DATA_SHARED_END 0x3f04fff0
#define TCML_END 0x1f807ff0
;
; Note:
; memory range 0x3f07ebf0 - 0x3f07eff0 is reserved for bootloader_vybrid segment
;
#define MY_ALIGN(address, alignment) ((address + (alignment-1)) AND ~(alignment-1))
LOAD_REGION_INTRAM CODE_BASE_ADDR_START
{
VECTORS CODE_BASE_ADDR_START
{
vectors.o (.vectors_rom,+FIRST)
vectors.o (.cfmconfig)
}
CODE +0
{
* (InRoot$$Sections) ; All library sections for example, __main.o,
; __scatter*.o, __dc*.o, and * Region$$Table
* (KERNEL)
* (.text)
* (+RO)
}
RAM_VECTORS DATA_BASE_ADDR_START ; For ram vector table. Used when MQX_ROM_VECTORS is set to zero.
{
vectors.o (.vectors_ram)
}
DATA +0 ALIGN 32
{
* (+RW, +ZI)
}
KERNEL_DATA_START +0 ALIGN 16
{
* (KERNEL_DATA_START) ; start of kernel data
* (SRAM_POOL_START)
* (UNCACHED_DATA_START)
}
KERNEL_DATA_END DATA_BASE_ADDR_END - (0x03*0x10) ; RAM_END - 3 x aligned value with align 0x04
{
* (SRAM_POOL_END)
* (UNCACHED_DATA_END)
* (KERNEL_DATA_END) ; end of kernel data
}
SHARED_RAM_START DATA_SHARED_START EMPTY 0xfff0
{
}
SHARED_RAM_END DATA_SHARED_END
{
*(SHARED_RAM_END)
}
; mem_init writes a storeblock_struct at the end of kernel data,
; max size 32 bytes, so use 0x100 offset
BOOT_STACK_ADDR (TCML_END - 0x100) OVERLAY
{
*(BOOT_STACK)
}
; We don't use their stack or heap, but the tools expect this
; to be here, so we have a dummy placeholder.
ARM_LIB_STACKHEAP (TCML_END - 0x100) OVERLAY EMPTY UNINIT 0x04
{
}
}
Regards,
Emmanuel