Hi,
We are using a Freescale MMA8452Q accelerometer in our design. The layout guidelines (AN4077) have the following recommendations that I would like clarification on:
In the same application guide is a photo of the Freescale demo board which appears to violate these recommendations having vias immediately around the package as well as a decoupling capacitor:
My question is - how essential is the clearance for vias and components to the MMA8452Q? Ideally I would like the decoupling closer than 5mm to the device. Also what is the mechanism for 'causing package stress' if a capacitor is within 5mm of the QFN?
Also, do I really need to put dummy traces on the NC pads?
Thanks, Mark
Hi Mark,
This device is sensitive to board mounting, the mentioned recommendations were developed to minimize the offset errors, however, these are not critical.
You can place decoupling capacitor closer than 5mm to the device without a problem, under normal conditions, this should not cause any package stress.
And no, you do not really have to put dummy traces on the NC pads.
Regards,
Jose
Thank you for your reply. I will move my decoupling closer to the IC now.
You mentioned 'offset errors' - what do you mean by this?
Thanks, Mark
Hi Mark,
One of the leading sources of error in an accelerometer is attributed to the 0g-offset or bias error, which is defined as “the difference between the measured value of the sensor from the true zero value”, this is what I meant with “offset error”.
You can find how to deal or calibrate this offset error in the following application note: http://cache.freescale.com/files/sensors/doc/app_note/AN4069.pdf
Regards,
Jose