S32K148 SM_048 Fault Injection

[hochs2]

As per S32K1xx Series Safety Manual, Rev. 4, 09/2018 pdf document SM048
"Implementation hint: In debug mode, the DBG bit in the Watchdog Control and Status Register (CS) controls operation of the WDOG. If the CS[DBG] = 1, the WDOG counter continues to run in debug mode.LPIT_MCR[DBG_EN] controls operation of the LPIT counter. If LPIT_MCR[DBG_EN] = 1, the counter continues to run. "

Query:
1. CS[DBG] = 1
2. LPIT_MCR[DBG_EN] = 1,
if we are able to set these two bits then we are able to meet the requirement or is there any other condition should be taken care how we are able to test this SM048?

[nxf61080]

Hi Hunter,

According to the query:

1. CS[DBG] = 1, implies that the WDOG counter continues to run in debug mode.
2. LPIT_MCR[DBG_EN] controls operation of the LPIT counter. If LPIT_MCR[DBG_EN] = 1, the counter continues to run.

These take care that the WDOG and the LPIT continue to operate in debug mode.

However, to satisfy assumption SM_048, we need to additionally make sure that if modules like the Watchdog Timer (WDOG), Low Power Serial Peripheral Interface (LPSPI), Low Power Periodic Interrupt Timer (LPIT), FlexCAN, or in general any modules which can be frozen in debug mode, are functional safety-relevant, they are configured by the application software such that modules continue execution during debug mode, and not freeze the module operation if debug mode is entered. You can refer to table 5-2 in the safety manual for more information:

Thanks & Regards
Manibha Sharma