S12ZVL128 FMEDA clarification on COP

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S12ZVL128 FMEDA clarification on COP

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AdrianR
NXP Employee
NXP Employee

Customer needs some clarification on the content of the Clock_FMEDA_KNOX_Customer.

In the Column Safety mechanism preventing violation of safety goal, for failures "Stuck at", the following note is given:

[SM_1021] having a controlled diagnostic coverage of 0.0% and having a detected diagnostic coverage of 0.0%

Validate Clock using LIN communication within fault tolerant time interval

Questions: Why diagnostic coverage is 0%?

This failure can not be detected by using internal watchdog COP?

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aarul
NXP Employee
NXP Employee

Hello Adrian

I checked the FMEDA, and found that number is a function of [OSCE, PLLSEL] and CMPUCLKS[COPOSCSEL]. In the current configuration, the value of these are [OSCE, PLLSEL] = 1 and CMPUCLKS[COPOSCSEL] = 0. In this mode, FIRC is the source of system PLL as well as the reference clock of WDOG. Hence, there is no coverage on FIRC (common-cause), or the External Oscillator. Hence, the statement about 0% Diagnostic Coverage.

If you re-configure the FMEDA to change these values based on actual customer application you will see the numbers updated accordingly.

Hope this helps,

Regards

-Aarul Jain

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