s32k144 FlexCan : Get timestamp in seconds : Set CAN accepted IDs

[alessio_gagliar]

Dear NXP community,

I am using the FlexCAN project example on my S32k144 and I am stuck in a couple of things. First of all, for my application I need to keep track of a timestamp in seconds for every message received from CAN bus. I would to initialize a variable like this “double tstamp = 0.00000;” that should be updated for every message received.

In FlexCAN.c in the function FLEXCAN0_receive_msg() there is a var named RxTIMESTAMP but I do not know how I can convert such value into seconds. There is by chance a simple way to do this?

A second question is, I want to receive all msgID that travels on the CAN bus. Considering that my board is set as node B. So in the example FLEXCAN0_init I read as follow:

CAN0->RAMn[ 4*MSG_BUF_SIZE + 1] = 0x15540000;

That correspond to msgID 0x555. If I would to receive for example 0x1FE how I should set the value of CAN0? And for receiving all msgIDs (no filter)? I do not understand how 0x15540000 is related to 0x555.

Unfortunately, I searched the forum but found no answer to these questions. Please forgive me if such question may seems trivial, but to me they're not.

Sincerely,

Ale

[PetrS]

Hi,

for the time stamps please read chapter 55.5.9.6 Time stamp of the RM. In short;  The value of the free running timer is sampled at the beginning of the ID field on the CAN bus, and is stored at the end of move-in in the TIME STAMP field.

When CTRL2[TIMER_SRC] =1, the free running timer is continuously clocked by an external time tick (LPIT channel 0 trigger output). When CTRL2[TIMER_SRC] =0, the free running timer is clocked by the FlexCAN bit-clock, which defines the baud rate on the CAN bus.

If you want to receive all message into single MB then clear mask acceptance register. The RXMGMASk if MCR[IRMQ] = 0 and RXIMR4 if MCR[IRMQ] = 1. IRMQ distinguish between global or individual masking scheme.

If both standard and extended IDs should be received to single MB set CT|RL2[EACEN] bit and have corresponding bit in mask register cleared as RXMGMASK register description shows.

CAN0->RAMn[ 4*MSG_BUF_SIZE + 1] = 0x15540000;

equals to 

CAN0->RAMn[ 4*MSG_BUF_SIZE + 1] = 0x555<<18;

This is because standard ID is left shifted by 18 in MB's ID word 

Note mask should be also shifted the same way.

BR, Petr