Why PIT is needed for partition of clock gating even though we are having STM timers based on core clock frequency we are supplying the clock to STM?
Hi @deepika_16,
PIT decrements from set value to zero and STM increments from zero to set value.
Also, all the PIT instances are capable of generating periodic triggers. PIT triggers are routed to motor control IPs such as eMIOS, LCU, BCTU, ADC etc. via TRGMUX. It also contains RTI which can be used for waking up from STOP mode and PIT can be used to trigger DMA.
Best regards,
Julián