SCST - m0_scst_exceptiion_nmi_test stays in Hard Fault handler

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SCST - m0_scst_exceptiion_nmi_test stays in Hard Fault handler

956件の閲覧回数
lega_06
Contributor I

Hi NXP Team.

I'm working with SCST (SCST_M0_S32K118_RTM_1.0.1) in S32K116  
I was able to integrate SCST in S32K116, also I was able to run 16 tests out of 18 that SCST give us 
and I got the expected signature correctly  but when I try to run m0_scst_exceptiion_nmi_test (Test#5), it appears a HardFault exception  and seems it stays in a loop here 

lega_06_0-1664821255237.png

I'm not sure if I should add something in nmi_handler, HardFault_handler function 
to it can pass this test, I run all these tests before my application, I leave a snipped 
how I'm running this test in my project, all my project is compiled in GHS compiler.

lega_06_2-1664821999974.png

 

How could I solve this issue and be able to get an expected signature correctly by  m0_scst_exceptiion_nmi_test?

 

 

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912件の閲覧回数
martinkaspar-r3
NXP Employee
NXP Employee

Hello,

The m0_scst_exception_nmi_test triggers HardFault and NMI exceptions. In case of this test is correctly integrated then there is no exception visible to user application because the SCST software uses its own interrupt vector table. So there is no need to update user application NMI and HardFault exceptions handlers.

In case of application HardFault exception appears during test execution then there is most probably conflict e.g. with MPU configuration. Would it be possible to verify whether this test works correctly with MPU (Memory Protection Unit) disabled? If it works with the MPU disabled then we recommend to unprotect the address (0xE000ED04).

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904件の閲覧回数
lega_06
Contributor I

Hi @martinkaspar-r3  

Actually, I found the issue, at the beginning  I had issues with the GHS compiler (v2021.1) due to STMIA assembly instruction within  m0_scst_exception_nmi_test  and m0_scst_loadstore_test3  using  STMIA and I got this issue before.

issue1.PNGissue2.PNG 

R1 and R5 can't stay within the brackets, so to compile I remove these registers  then I noticed that I need what was stored in R1 and R5, So I had to fix that  with this fix 

STMIA R1!.{R0}      STMIA R5!{R1,R3}
STMIA R1!.{R1}      STMIA R5!{R5,R7}
STMIA R1!.{R2}

in fact in the test m0_scst_loadstore_test3 failed after this fix because within the CMP instruction R5 is different from R4, So I had to ADD

0X08 in R5 to force this comparison.

loadstore3__fixed.PNG

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

How can I fix that without I have to add this addition to R5 ? 

This fix works for me, but  I'm not sure if this fix is implemented in the best way 

what other solution or suggestions would you give me for that? 

Thanks.

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864件の閲覧回数
martinkaspar-r3
NXP Employee
NXP Employee

Hello,

you have to switch to the newer product version, release 1.0.2. where the following known issue was fixed:

CSTL-864: STMIA instruction compilation problem
- Fixed GHS compiler error linked with compilation of STMIA instruction.

Note, even this product version does not support your GHS compiler version. It supports:

- Green Hills Multi 7.1.6d / Compiler 2020.1.4
- Green Hills Multi 7.1.6 / Compiler 2018.1.4

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