S32K3xx BootLoader FlashDriver

[Alicetian]

Hello,

Flash drive function is implemented by configuring EB, The EB version is 28.2.0, The RTD version is 2.0.2.

When performing erase or write functions,The corresponding code is copied from Flash to Ram,The driver function test is normal.

Now,I closed the EB project configuration Flash copy to Ram's project. Plan Call C40_Ip_AccessCode function directly. In order to prevent the erase or write function from being accidentally triggered.  Generate C40_Ip_AccessCode functions into the RAM interval, Only when flashing the application, the data generated by the compilation of the C40_Ip_AccessCode function is downloaded to the RAM interval through the host computer software, The RAM address is 0x2042DF00.

In the above way, I encountered the following problem.

1）

Error interrupts are triggered when erasing or writing functions.

If the Ram address is set to 0x20002000(DTCM address), The above error problem does not exist.

What is the reason for this?

[Mahsaad756]

Hello All, 

Now I am using s32k311 target configured all the previous steps in EB tresos to erase a sector form Pflash 
I am executing from Ram correctly but i have some error terminate the erase operation MCRS[PES] = 1 ; 
this mean Program and Erase Sequence Error , and i followed all the steps in S32 Memory Guide 

but the same sequence error had occurred 

Best regards ,

[nxf78987]

Hello @Alicetian,

Could you send me the .map files and linker files in two situations?

Best regards,

Dan

[Alicetian]

Hello,

The linked file is generated based on the demo,The place of modification is shown in the figure below.

After modifying the following value 0x030B0001UL to 0x030F0001UL in the startup code,the running and flying problem no longer occurs.Is that the reason for this?

Now,I have another question,he C40_Ip_AccessCode function is generated in the RAM segment, and the following content is also generated in the RAM address space, What is the reason for this?  Will this affect the normal operation of the program?

[nxf78987]

Hi @Alicetian,

Because I can't reproduce your issue from my site. So, Could you send me the configuration files?

BRs,

Dan

[Alicetian]

Hello,

        Thanks for your reply, The configuration file is based on the S32K3xx demo.Looking forward to your reply

[nxf78987]

Hi @Alicetian,

Could you show me the value of S32_MPU->RBAR and S32_MPU->RASR register compatible with rbar[5] and rasr[5]  in two situations (0x030B0001UL and 0x030F0001UL)?

Best regards,

Dan

[Alicetian]

Hello,

0x030B0001UL rbar[5]=0x20400000, rasr[5]=0x30bc023

0x030F0001UL rbar[5]=0x20400000, rasr[5]=0x30fc023

The above problems are episodic and now It's not easy to reproduce.

My BootLoader project implements flashing based on the UDS protocol,My goal is to generate Flash drivers directly into the RAM zone to prevent erase and write functions from being triggered by mistake,Flash drivers are only downloaded to the RAM zone when the UDS protocol is flashed,In my opinion, the S32K3xx platform should all be universal,Can you give me some advice? Can you provide a S32K3xx demo on how to make Flash Driver image?Thanks!

[nxf78987]

Hi @Alicetian,

I checked and I saw that there is only an S bit that was changed in your situation. And this bit affected the multicore context. And, Are you using multicore?

Second, Could you check whether the all of sub-functions in the C40_Ip_AccessCode function was put on RAM?

Best regards,

Dan

[nxf78987]

Hi @Alicetian,

what is the interrupt that occurs when has the error?

Could you dump the value of the SCB registers?

Best regards,

Dan