S32K324 reset failure and cache issues

[xinping]

hi there,

recently I met two issues during developing ECU with S32K324.

1. while debugging the software with PEmicro and S32DS, i reset the program through the host computer(a CAN protocol) sending a message. No matter which reset methods i used( API mcu_performreset() or watchdog timeout), at the ninth time reset, the program would always dead in a ram  fixed address(this address can be found and actually variables exist there). Even i marked a breakpoint at the startup function, the program could not stop. Why could this issue happen? When the chip is not in debug mode, there isn't this problem. 

2. after reprogram the flash address, i would like to calculate the crc value of the programmed data to checkout whether there are wirtten correctly or not. However,  when i enabled the cache funciton, everytime the global variables of the read data are not the latest, actually i even have not idea how were the variables changed, cause the data were neither the same with the data in flash nor the same with the last data. The made the CRC value didn't match the value on host computer. Finally i tried to use the API sys_m7_cache_clean() to clean the cache data before reading the flash data, in this case, the variables could be updated and the crc check was also passed.  I would like to konw：are there any risks if i use the api   sys_m7_cache_clean() in my app code? Why could the data not be read immedately after written?

i am looking foward to a supprot and response. thanks!

[danielmartynek]

Hello @xinping,

1.

Please have a look at the Reset escalation in the RM,

Section 31.4.3.4.2 Reset escalation

You mentioned the WDOG (SWT) which is a functional reset.

33.7.7 Functional reset escalation

"If the counter reaches the value in the FRET field of the RGM_FRET register, MC_RGM asserts a destructive reset."

The reset counter can be cleared by writing 0xF to FREC between reset events.

2.

This is the purpose of the cache, the data are read from the cache and not the actual flash memory on a hit.

Seems like you are using the IP RTD drivers.

The Cache_Ip driver has this APIs that can be used for the purpose.

Cache_Ip_Invalidate()

Cache_Ip_InvalidateByAddr()

Cache_Ip_Clean()

Cache_Ip_CleanByAddr()

The description of the functions can be found in Cache_Ip.h

Regards,

Daniel

[xinping]

thanks for support, Daniel!

this two issues have been solved. The first one is excatly the point you mentioned, and I just clear the counter everytime it functional reset, but it seems this problem has been fixed in MCAL V2.0.0. 

the recond problem, FAE suggested me to change the MCAL configuration of FLS module. But the risk of using API cacheclean he had no idea either.

Anyway, thanks a lot.

regards.

xinping