Hi,I have a question about CAN.
the MailBox 16 matched only 0x1f1 and the bit 16 of IMASK1 is 0,
the MaiBox 31 matched MULTIPLE CAN IDs include 1F1,and the bit 31 of IMASK1 is 1.
I use PCAN send 1F1 message per 100ms，then initialize the CAN. Then i find the 1F1 message into the MailBOX31, Why？ and the MailBox 16 seems locked.
I know the function of IMASK,I just decribing the peration environment.
the same code, when the CAN initializtion process, I do not send 1f1 message per 100ms. after successful initialization,I will send 1F1 message per 100ms. Then the message can move into the MailBox 16,all is normal. so why?
In addition， when the problem happened（1F1 message into MailBox 31），I read other Maibox through the debugger，then the problem restore normal（1F1 message into MailBox16），so why？
Are there any other resions for this problem？
if you are sending messages before CAN is initialized, then PCAN is sending the message still, due to missing ACK.
However after CAN init the matching should work normally, that is first free-to-receive matching MB should be selected.
Displaying MB area using debugger is not recommended, as it can do lock/unlock operation on MBs and you can see unpredictable behavior.
The MB locking is a FlexCAN feature/mechanism that prevents a new frame from being written into the MB while the CPU is reading it. So it is always active. User have to read MBs in correct way, i.e use MB flag to know if frame was received.
For example，I set MB_15 that receive only one message(CANID:1F1), Then set anther MB_31 that can receive all messages(all CAN IDs including 1F1).
So,I use PCAN send 1f1 message, it will set flag of MB15 and MB31. after i use MB flag to deal with MB15 message，the flag MB15 is cleared ,but when receive 1f1 message ,the flag of MB15 is not set again, only set the flag of MB31.
What I want to ask is how to deal with MB15 that can set flag when receive the message？
If the MB15 is not deactivated and it is free-to-receive, then it must accept new message again and MB15 flag must be set. After MB flag is set you should do following...
1. Read the Control and Status word of that mailbox. This will lock MB.
2. Check if the BUSY bit is deasserted, if not, wait till become deasserted.
3. Read the rest contents of the MB.
4. Clear MB flag.
5. Read the free running timer to unlock the MB. The MB becomes free-to-receive and is available for reception again.
interrupt mask register IMASK just specify if MB interrupt will be called when message is successfully transmitted/received from/into the MB (IFLAG bit is set). So it has nothing with matching process.
The MB is locked when the CPU reads the Control and Status word of an Rx MB with codes FULL or OVERRUN. The lock is released when the CPU reads the Free Running Timer (global unlock operation), or when it reads the Control and Status word of another MB regardless of its code.
Cannot explain a behavior you have without inspecting your code. Check if Rx MBs are properly initialized and review a part of code used for reading the Rx MB.