Hi,
I wrote a driver with a goal to access all Spi instances and implemented macro definitions so that it can be used easily in the future. I used these macros to initialize one of my SPI channel. It worked well for everything but somehow for the TCR register, it only updates the last register write and it does not update right away. It updates when it escapes the function. Weird! Consider the following example for better explanation.
The macros:
#define spi_SetClkPrescale(bInstance, bPrescaler) (pSpiRegisters[bInstance]->TCR = (pSpiRegisters[bInstance]->TCR & ~LPSPI_TCR_PRESCALE_MASK) | LPSPI_TCR_PRESCALE(bPrescaler))
#define spi_ConfigurePcs(bInstance, bIndex) (pSpiRegisters[bInstance]->TCR = (pSpiRegisters[bInstance]->TCR & ~LPSPI_TCR_PCS_MASK) | LPSPI_TCR_PCS(bIndex))
#define spi_SetFrameSize(bInstance,bSize) (pSpiRegisters[bInstance]->TCR = (pSpiRegisters[bInstance]->TCR & ~LPSPI_TCR_FRAMESZ_MASK) | LPSPI_TCR_FRAMESZ(bSize))
Initialize SPI
spi_SetFrameSize(1, 7);
spi_ConfigurePcs(1, 0);
spi_SetClkPrescale(1, 2);
This will then only updates the Prescaler and not the frame size nor the PCS.
This however works for other registers and it updates everything.
I have attached a simplified module to save work for anyone trying to help me out. In this example, the CCR register updates everything (Line 91-94) while the TCR only updates the final write (Line 88) and discards the previous.
已解决! 转到解答。
The Transmit Command Register (TCR) is not an ordinary register, it is a FIFO.
Please take a look at the description of the register in the RM.
Section 51.3.1.15.2 Function
If you are using several commands, it is better to just store them as constants and write the commands as 32b words without reading a modifying the value in the register.
Regards,
Daniel
The Transmit Command Register (TCR) is not an ordinary register, it is a FIFO.
Please take a look at the description of the register in the RM.
Section 51.3.1.15.2 Function
If you are using several commands, it is better to just store them as constants and write the commands as 32b words without reading a modifying the value in the register.
Regards,
Daniel