In the S32K1XX reference manual, there is the below comment from the page 559.
We set the SPLLDIV2_CLK to 74Mhz(for I2C clock generation) which beyond on the below suggestions on the reference manual.
The clock source for I2C is through the system PLL by an external crystal.
May we know if any effects based on the above clock setting?
Ex. Does the higher clock setting affect the MCU life expectance or MCU malfunction?
looking for the professional answer urgently.
Thanks a lot!
Hello @yihe_zuo,
You can select SPLLDIV2_CLK but the max frequency must be equal or less than the BUS_CLK frequency.
S32K1xx RM, rev.13
S32K1xx DS rev.13
74MHz therefore can't be used.
Please follow the specification.
Thank you,
BR, Daniel
