about the control of STB pin of CAN transiver when G3 is in stdby mode

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about the control of STB pin of CAN transiver when G3 is in stdby mode

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brian_w
Contributor III

Hi all,

In our design, we connect a GPIO pin in VDD_IO_B domain of G3 to the STB pin of CAN transiver directly. And we have pull up resistor for it on the board, because the STB is high valid. The STB pin also has a pull up resistor inside the transiver. When G3 go into standby mode, the power of the VDD_IO_B is power off. We find the voltage of STB is only about 0.7V, so the transiver can not go into standby mode.

How can we resolve this problem?

Thanks!

brian_w_1-1723272822928.png

 

 

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Daniel-Aguirre
NXP TechSupport
NXP TechSupport

Hi,

Thanks for your feedback. Below will be some comments on regards of your questions:

When the GPIO of G3 is powered down, does it behave as a high impedance or a small resistance?

[DA]: As told under the IOMUX sheet, it will be powered down, not in Hi-Z. In other states, the Hi-Z is explicit, but in this situation, it will just be in a powered down state. If you are planning on using this pin while in STBY mode, then VDD_IO_B should use a power rail active in STBY mode.

Please, let us know.

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brian_w
Contributor III

Hi,

Thanks for your reply.

Whe in standby state, this GPIO is powered down. We measured the power supply of VDD_IO_B, and it is indeed powered off.

We suspect that when the GPIO is powered down, it cannot present a high impedance state to the outside, but instead behaves as a small resistor, resulting in a pull-up voltage that does not reach 3.3V. As the follow figure shows.

brian_w_0-1723511629847.png

When the GPIO of G3 is powered down, does it behave as a high impedance or a small resistance?

Thanks a lot!

 

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Daniel-Aguirre
NXP TechSupport
NXP TechSupport

Hi,

Thanks for your feedback. Below will be some comments on regards of your questions:

When the GPIO of G3 is powered down, does it behave as a high impedance or a small resistance?

[DA]: As told under the IOMUX sheet, it will be powered down, not in Hi-Z. In other states, the Hi-Z is explicit, but in this situation, it will just be in a powered down state. If you are planning on using this pin while in STBY mode, then VDD_IO_B should use a power rail active in STBY mode.

Please, let us know.

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brian_w
Contributor III

Hi,

Thanks a lot, I understand.

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Daniel-Aguirre
NXP TechSupport
NXP TechSupport

Hi,

We might be misunderstanding the overall inquiry. If so, we do apologize.

For the following comments:

"When G3 go into standby mode, the power of the VDD_IO_B is power off"

We understand that the VDD_IO_B power rail is not being kept ON, as an STBY power rail. If so, then the GPIO's of VDD_IO_B will be powered down, as told under the IOMUX sheet:

DanielAguirre_0-1723504190853.png

For which, seems to be that the pin is not maintaining its configuration, due to the power loss. 

Please, let us know.

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