When debugging Csec module with S32K118, example 1_Configure_part_and_Load_keys is used. FSTAT deposit writes 1 to clear FPVIOL and ACCERR. Why is it still 0 detected by debugger after writing.Did the register automatically clear to 0 after writing 1 in the initialization phase?
已解决! 转到解答。
If the two flags were set, the W1C would clear the flags.
But since the flags are not set, the code does nothing.
The code does not suppose to set the flags.
BR, Daniel
Hi @ZEROOO,
I'm not sure if I understand the question.
But this is expected, the bits are W1C (Write 1 to clear), refers to a register bitfield that must be written as 1 to be "cleared."
Regards,
Daniel