Hello,
I work on the RTD 1.0.1 withthe GCC 9.2 compiler, and my program generates a linker file with a ".ARM.exidx" function placed in RAM memory. this is problematic when i generate an SREC file. How can i solve this problem bacause i just want to use FLASH. How to bypass this function ?
In the linker Section where the sections are named, replace what I call 'FLASH' below with what you call FLASH, unless you also use the name FLASH.
From my KL27 linker file, at this level the chip doesn't matter.
/*
* You can assign a section to a previously defined region of memory
* by using >region.
*
* > FLASH
*
* tells the linker to locate the entire section in the memory space
* called 'FLASH'.
*/
/*
* Exception handling/unwind - some Newlib functions (in common
* with C++ and STDC++) use this.
*/
.ARM.extab :
{
KEEP(*(.ARM.extab* .gnu.linkonce.armextab.*))
} > FLASH =0xFF
/*
* An obscure bug require __exidx_start and __exidx_end to be
* inside the block, for exception handling to work on some CPUs.
*
* https://community.arm.com/developer/tools-software/oss-platforms/f/gnu-toolchain-forum/11581/gcc-7-2...
* https://community.nxp.com/t5/MCUXpresso-IDE/MCUX-11-1-0-C-exceptions-not-being-caught-w-solution/m-p...
*/
.ARM.exidx :
{
__exidx_start = .;
KEEP(*(.ARM.exidx* .gnu.linkonce.armexidx.*))
__exidx_end = .;
} > FLASH =0xFF
/*
* ARM.attributes names a section that contains build attributes.
* Type: SHT_ARM_ATTRIBUTES
* This avoids creating .ARM.attribute.N output sections.
*/
.ARM.attributes 0 : { *(.ARM.attributes) }
Hi ,
The target is the S32K116.
Hi,
what's your target MCU?