56F8357 ext. memory (EMI)

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56F8357 ext. memory (EMI)

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Ben
Senior Contributor I

Hi

I am trying to connect the 56F8357 to external RAM via external 8 bit data bus.

I defined the bus to 8 bit, and I can communicate with the RAM. However, I don't know how to define the data so I will be able to write arrays

of 8 bits data (unsigned char). Trying to copy array from internal to external RAM copy only the odd array elements. I assume that it is because of the

data in the internal RAM stored in 16 bits array. Any idea how it can be done?

TIA

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Monica
Senior Contributor III

Ben, how is it going, was this helpful?

We'd like to know, please keep us posted! :smileywink:

Monica

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Ben
Senior Contributor I

Monica, I did not notice that I got the eresponse, as it was 2 months after my post. Anyhow, it is the 1st time I am working with this chip, and I am very dissaponted, it looks that it will be the last project with it. external bus support is one of the reasons. Freescale should have more clear documents for developers about such issues.

Thanks for your concern, thad thank you xiangjun rong

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Monica
Senior Contributor III

Ben,

I understand your situation and apologize for your discontent. We'll take it into consideration and above it all, your feedback is very appreciated.

Thanks!

Monica-

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Ben
Senior Contributor I

Monica,

You don't really understand my frוsration: I am developing with freescale chips since Motorola time (the 80's!).

Usually, I am very satisfied with your products, and Freescale is my 1st option with new designs.

It is the first time I am so disappointed with a chip. My  customer should have enter production with it, if only Freescale was more cooperative with documentation and support for this chip...

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xiangjun_rong
NXP TechSupport
NXP TechSupport

As you know, the MC56F83xx family has External Memory Interface, so the MC56F83xx family can hook external SRAM, but if customer wants to access the external SRAM in Byte mode, the external SRAM itself should support Byte operation, in other words, the external SRAM should have /LB(Low Byte Enable) and /UB(Upper Byte Enable) pins, in general, the chip select pin of SRAM is tired to Ground, the /LB pin of SRAM is connected to /CS pin of DSC, /UB is connected to another /CS, it is okay from hardware perspective.

Customer can configure the EMI module to support Byte operation. BTW, the on-chip RAM of DSC supports byte operation unconditionaly.

Regarding the issue that customer only connect a Byte SRAM(the High data bus is float), in the case, customer can access the Byte memory as a word memory with the information in mind that only low Byte data are valid.

XiangJun Rong

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