ls1043 : USB 3.0 controller in host mode

[jjp]

Hello *,
I try to configure USB 3.0 controller on an ls1043ardb. I use a stack that already working

on x86 real and virtual targets. On these architecture xHCI controller is accessed through PCI.

I try to port this stack on arm-v8 architecture.

Documentation (QorIQ LS1043A Reference Manual, Rev. 2, 11/2016)
seems pretty poor concerning initialization of DWC3 register set.

There is something in "35.4.6.1.4.1 Initializing global registers" but it doesn't describe
the process and values to be set in registers for host mode.

Except u-boot driver or linux kernel driver there is no explanation about
how this controller works..

For the moment, when a device in plugged in USB1 connector linked to USB1 controller

PORTSC_PR bit is written in PORTSC register and an IRQ is received with bits

USBSTS_PCD and USBSTS_EINT set in USBSTS register.

Moreover IP bit is set in IMAN[0] (0 for interrupter 0). So every seems all right except.. event ring.

The problem comes from *event ring* that creates *no* event.. xHCI controller

is supposed to generate a "Port Status Change Event TRB" (See xHCI specification revision 1.1

chapter 6.4.2.3)

Do you know where I can find a documentation that explains how to configure
the USB 3.0 controller as *host only* properly?

I don't find something relevant in OTG chapter.

Thanks.

[Pavel]

Look at the Section 35.4.4 of the LS1043a Reference Manual.

Have a great day,
Pavel Chubakov

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[jjp]

Hello Pavel,

Hmm source code as documentation and application note...

I expect something different [:

Thanks.

[Pavel]

Attached file contains USB3 software from SDK 2.0 for the LS1043aRDB board. Use this software as example for USB3 using on the LS1043a board.

Have a great day,
Pavel Chubakov

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[Pavel]

We do not have Application Note for USB 3.0 eHCI. See attached file. This file contains eHCI driver from SDK 2.0.

See also documentation for Linux USB API on the following page:

https://kernel.readthedocs.io/en/sphinx-samples/crypto-API.html

See recommendation from the Section 2.7 from TI for USB eHCI Host initialization:

http://www.ti.com/lit/ug/spruhj7/spruhj7.pdf

It looks like that Linux USB3 driver porting manual from Renesas also will be helpful:

http://www.tyan.com/manuals/LinuxUSB3DriverPortingManual.pdf

http://lxr.free-electrons.com/source/drivers/usb/host/xhci.c

Have a great day,
Pavel Chubakov

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[jjp]

Hello *,

Thanks Pavel for this help.

Right now I have an other concern.

I experiment some robustness problem on ls1043ardb's USB3 controller.
I find some errata about it from "LS1043A Chip Errata Rev. 2, 11/2016"
but they seems to have no effect.
Do you provide more explanation about *USB PHY* programming?
There are a lot of registers but nothing clear about what there are doing..

I use same USB stack on ls2085a-rdb and it works properly.
Any hint?

Thanks.

[jjp]

Hello *,
I have a more precise observation concerning behavior of xHCI controller on ls1043.

I simplify my test by keeping u-boot initialization :
- except by reducing segment number from 3 to 1 and event ring size from 64 to 32
- all allocated ring buffers are keep between u-boot and my binary
- registers are kept (operational and runtime)
- *no reset* is done, just *stop* and *start* controller through R/S bit of USBCMD.

Between stop and start sequence, I add these steps :
- map ERSTBA content to virtual memory *virt_erstba*. It is possible to retrieve
first segment i.e. ERST[0]
- map content of first segment that give first event ring address *virt_er*.
- trigger port reset through PORTSC

So, I can see event generated in event ring allocated by u-boot in my binary memory space.

Problems come when I try to write for example the same value in ERSTBA i.e
ERSTBA = ERSTBA to reset event ring state machine as explain in xHCi specification.

There is no event generated and something seems to be broken in event ring state
machine.. just by writting same value as previous in ERSTBA.

As anyone experiment this problem?
Is it possible to have some explanations concerning event ring state machine of controller?

I flush cache of region *virt_erstba* and *virt_er* with no success..