Hi Everyone,
I’m trying to find how to access(R/W) from Uboot to EEPROM on T1024RDB – AT24C256 (ADDR =0x50). I couldn’t find any explanation about it.
I found something in “QorIQ-SDK-2.0-IC-Rev0.pdf” p.95:
Writing SPD
DDRC takes its configuration parameters from EEPROM that are on I2C bus. To provide configuration to DDRC, its respective
EEPROM needs to be programmed with the desired configuration.
EEPROM for DDRC1 is at address 0x51
B4420QDS has only one DDRC, so only one SPD needs to be programmed for this DDR controller.
By default, EEPROMs are write protected. Use the following commands to make them writable:
mw.b 0xffdf0055 0x8
In order to write SPD, TFTP SPD binaries and write them on EEPROMs using the following commands:
tftp 1000000 spd_1866_dual_rank_4GB_DDRC1.bin
i2c write 0x1000000 0x51 0 0x80
reset
After configuring EEPROM, reset board to let DDRC settings take effect.
But all this above is only about B4420QDS board. Are any options that T1024RDB has something similar ?
When I boot up the system I see the next :
U-Boot 2016.012.0+ga9b437f (Sep 13 2016 - 16:36:48 -0400)
CPU0: T1024E, Version: 1.0, (0x85480010)
Core: e5500, Version: 2.1, (0x80241021)
Single Source Clock Configuration
Clock Configuration:
CPU0:1400 MHz, CPU1:1400 MHz,
CCB:400 MHz,
DDR:800 MHz (1600 MT/s data rate) (Asynchronous), IFC:100 MHz
QE:200 MHz
FMAN1: 700 MHz
QMAN: 400 MHz
L1: D-cache 32 KiB enabled
I-cache 32 KiB enabled
Reset Configuration Word (RCW):
00000000: 0810000e 00000000 00000000 00000000
00000010: 4a800003 80000012 ec027000 21000000
00000020: 00000000 00000000 00000000 00030810
00000030: 00000000 0b005a08 00000000 00000006
I2C: ready
Board: T1024RDB, Board rev: 0x03 CPLD ver: 0x07, boot from NOR vBank0
SERDES Reference Clocks:
SD1_CLK1=156.25MHZ, SD1_CLK2=100.00MHZ
SPI: ready
DRAM: Initializing....using SPD
Detected UDIMM 18KSF51272AZ-1G6K1
2 GiB left unmapped
4 GiB (DDR3, 64-bit, CL=11, ECC on)
DDR Chip-Select Interleaving Mode: CS0+CS1
Flash: 128 MiB
L2: 256 KiB enabled
Corenet Platform Cache: 256 KiB enabled
Using SERDES1 Protocol: 149 (0x95)
SEC0: RNG instantiated
NAND: 1024 MiB
MMC: FSL_SDHC: 0
Firmware 'Microcode version 0.0.1 for T1024 r1.0' for 1024 V1.0
QE: uploading microcode 'Microcode for T1024 r1.0' version 0.0.1
EEPROM: Invalid ID (ff ff ff ff)
PCIe1: Root Complex, no link, regs @ 0xfe240000
PCIe1: Bus 00 - 00
PCIe2: Root Complex, no link, regs @ 0xfe250000
PCIe2: Bus 01 - 01
PCIe3: Root Complex, no link, regs @ 0xfe260000
PCIe3: Bus 02 - 02
In: serial
Out: serial
Err: serial
Net: Fman1: Uploading microcode version 108.4.5
Why I’m getting EEPROM Invalid ?
I found something in uboot , but it didn’t work.
=> i2c help
i2c - I2C sub-system
Usage:
i2c bus [muxtype:muxaddr:muxchannel] - show I2C bus info
crc32 chip address[.0, .1, .2] count - compute CRC32 checksum
i2c dev [dev] - show or set current I2C bus
i2c loop chip address[.0, .1, .2] [# of objects] - looping read of device
i2c md chip address[.0, .1, .2] [# of objects] - read from I2C device
i2c mm chip address[.0, .1, .2] - write to I2C device (auto-incrementing)
i2c mw chip address[.0, .1, .2] value [count] - write to I2C device (fill)
i2c nm chip address[.0, .1, .2] - write to I2C device (constant address)
i2c probe [address] - test for and show device(s) on the I2C bus
i2c read chip address[.0, .1, .2] length memaddress - read to memory
i2c write memaddress chip address[.0, .1, .2] length [-s] - write memory
to I2C; the -s option selects bulk write in a single transaction
i2c reset - re-init the I2C Controller
i2c speed [speed] - show or set I2C bus speed
=> i2c md 0x50 0 0x10
0000: ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff ................
=> i2c mw 0x50 0x0 0x18 0x10
=> i2c md 0x50 0 0x10
0000: ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff ................
=> i2c mm 0x50 0
00000000: ff ? 11
00000001: ff ? 12
00000002: ff ? 13
00000003: ff ? 14
00000004: ff ? =>
00000004: ff ? q
=> i2c md 0x50 0 0x10
0000: ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff ................
=> md 0xffdf0050
ffdf0050: 00000000 0f000131 02000000 00000000 .......1........
ffdf0060: 55aa0307 00000000 00000000 00000000 U...............
=> mw.b 0xffdf0050 0x8
=> i2c mm 0x50 0x0
00000000: ff ? 01
00000001: ff ? 02
00000002: ff ? 03
00000003: ff ? 04
00000004: ff ? q
=> i2c md 0x50 0 0x10
0000: ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff ................
=> i2c mw 0x50 0x0 0x18 0x10
=> i2c md 0x50 0 0x10
0000: ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff ................
=>
No matter what I did it return FF all the time .
Any inputs?
Thank you.
The message your u-Boot displays about invalid ID is not an indication
of any serious problem. u-Boot attempts to read a certain structure
from the onboard EEPROM and doesn't find it there. There is no critical
info in that structure. For details, see common/cmd_mac.c and
board/freescale/common/sys_eeprom.c
I'm not sure why you are unable to program your EEPROM, the commands
you are entering seem valid. In case your u-Boot is improperly configured
for the address size, try specifying it explicitly, the EEPROM expects
two-byte addresses, i.e. "mw 0x50 4.2 ...".
Have a great day,
Platon
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Hi Platon,
Thanks for help.
Please take a look in what I did :
1. => eeprom help
eeprom - EEPROM sub-system
Usage:
eeprom read <bus> <devaddr> addr off cnt
eeprom write <bus> <devaddr> addr off cnt
- read/write `cnt' bytes from `devaddr` EEPROM at offset `off'
2. Read from EEProm
=> eeprom read 50 0 0 10
EEPROM @0x50 read: addr 00000000 off 0000 count 16 ... done
3. Read from memory
=> md 0
00000000: ffffffff ffffffff ffffffff ffffffff ................
00000010: deadbeef deadbeef deadbeef deadbeef ................
00000020: deadbeef deadbeef deadbeef deadbeef ................
00000030: deadbeef deadbeef deadbeef deadbeef ................
I see exactly the same FFFFFF.....
4. Now I'm trying to write into EEPROM from memory 0x10 which is " deadbeef deadbeef deadbeef deadbeef" with offset 0x10 (16 bytes)
=> eeprom write 0x50 0x10 0 10
EEPROM @0x50 write: addr 00000010 off 0000 count 16 ... done
5. And now I'll read back what I've just wrotten :
eeprom read 55 0 0 10
EEPROM @0x55 read: addr 00000000 off 0000 count 16 ... done
6.
=> md 0
00000000: ffffffff ffffffff ffffffff ffffffff ................
Again FFFFFFFFFFFFFFFF....
Based on the EEPROM chip documentation (www.atmel.com/Images/doc0670.pdf),
it accpets either a single byte write or a page of 64 bytes write.
Both work as expected:
=> i2c md 50 0.2 10
0000: 4e 58 49 44 30 78 37 30 00 00 00 00 00 00 00 00 NXID0x70........
=> i2c mw 50 0.2 1 1
=> i2c md 50 0.2 10
0000: 01 58 49 44 30 78 37 30 00 00 00 00 00 00 00 00 .XID0x70........
=> i2c md 50 0.2 40
0000: 01 58 49 44 30 78 37 30 00 00 00 00 00 00 00 00 .XID0x70........
0010: ff ff ff ff ff ff ff ff ff ff ff ff 00 00 00 01 ................
0020: ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff ................
0030: ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff ................
=> i2c mw 50 0.2 0a 40
=> i2c md 50 0.2 40
0000: 0a 0a 0a 0a 0a 0a 0a 0a 0a 0a 0a 0a 0a 0a 0a 0a ................
0010: 0a 0a 0a 0a 0a 0a 0a 0a 0a 0a 0a 0a 0a 0a 0a 0a ................
0020: 0a 0a 0a 0a 0a 0a 0a 0a 0a 0a 0a 0a 0a 0a 0a 0a ................
0030: 0a 0a 0a 0a 0a 0a 0a 0a 0a 0a 0a 0a 0a 0a 0a 0a ................
Arbitrary byte count writes don't work, as you have already found.
Have a great day,
Platon
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Ok ... I got it. I forgot to double check about write operation. As you told it supports only byte or page (64 bytes) write operation.
Now it works fine.
Thanks for help.
Val
Some extra information .
The i2c probe return :
=> i2c probe
Valid chip addresses: 00 19 31 40 4D 50 51 68 6A
So , I've tried to read from chip 0x68 which is RTC...
=> i2c md 0x68 0 0x10
0000: 41 11 21 02 21 91 16 00 00 00 00 00 00 00 3c 00 A.!.!.........<.
I2C bus works fine.