DSPI: SPI3 no clock is observed

[deepanrajanbara]

Hi ,

Our board is based on LX2160a  in which we are configuring SPI3 and using it for communicating with the Slave. For this purpose in the RCW we have configured SDHC1_DIR_PMUX=3, SDHC1_DS_PMUX=2, SDHC1_DS_PMUX=2. We are using chipselect SPI3_PCS1. But when we initiate a SPI command using the spidev_tool from the kernel. We are not observing any clock or the chipselect toggling. Below is the dts file setting.

&dspi2 {
status = "okay";
spidev@1 {
#address-cells = <1>;
#size-cells = <1>;
compatible = "spidev";
spi-cpol;
spi-cpha;
reg = <1>;
spi-max-frequency = <4000000>;

};

};

Please let us know , Is there any other configuration missed in our setup.

Thank you,

Deepanraj.A

[yipingwang]

To use spidev, please open CONFIG_SPI, CONFIG_SPI_FSL_DSPI and CONFIG_SPI_SPIDEV. 

They are have been opened in arm64 defconfig.

Moreover, dts need modification, as below, under dspi node:

spidev0: spi@0

{

reg = <0>;

compatible = "rohm,dh2228fv";

spi-max-frequency = <3000000>;

};

[deepanrajanbara]

spidev_test -D /dev/spidev2.1 -H -O -s 16000000 -v -p "\x00\x00\x00\x00"
spi mode: 0x3
bits per word: 8
max speed: 16000000 Hz (16000 KHz)
^C[ 79.324058] fsl-dspi 2120000.spi: wait transfer complete fail!

root@mmWave-sku1:~# dmesg
[ 70.353606] dspi_setup
[ 70.353617] hz_to_spi_baud
[ 70.353622] ns_delay_scale
[ 70.353625] ns_delay_scale
[ 70.353630] SPI_IOC_WR_MODE 3
[ 70.353637] SPI_IOC_RD_MODE32 3
[ 70.353642] dspi_setup
[ 70.353647] hz_to_spi_baud
[ 70.353650] ns_delay_scale
[ 70.353654] ns_delay_scale
[ 70.353658] SPI_IOC_WR_BITS_PER_WORD 8
[ 70.353664] SPI_IOC_RD_BITS_PER_WORD 8
[ 70.353669] dspi_setup
[ 70.353673] hz_to_spi_baud
[ 70.353676] ns_delay_scale
[ 70.353679] ns_delay_scale
[ 70.353684] SPI_IOC_WR_MAX_SPEED_HZ 3d0900
[ 70.353689] SPI_IOC_RD_MAX_SPEED_HZ f42400
[ 70.353943] dspi_transfer_one_message
[ 70.353956] #### SPI MCR register dspi_transfer_one_message 0x330c80
[ 70.353963] #### SPI SPI_RSER register dspi_transfer_one_message 0x0
[ 70.353966] dspi_tcfq_write
[ 70.353970] fifo_write
[ 70.353973] dspi_pop_tx_pushr
[ 70.353977] dspi_pop_tx
[ 70.353984] #### SPI SPI_PUSHR register fifo_write 0x84020000
[ 79.324058] fsl-dspi 2120000.spi: wait transfer complete fail!

[yipingwang]

Please check your Linux Kernel source code whether the attached patch has been applied.

[deepanrajanbara]

Hi Yiping,

The patch is already applied on the kernel. But when we try with Linux 5.10.35 kernel lsdk 21.08 it is able to work , we are able to send and receive data from the spi. But when we use the linux 4.19.90 kenrel lsdk 20.04 we are observing this issue in LX2160a . Please let us know on a solution for Linux kernel 4.19.90.

Thanks,

[yipingwang]

I escalated this issue to the SE team, please refer to the following update from them.

There are many patches both in u-boot and in linux, I confirmed LSDK-20.04 didn't support DSPI in LX2160AQDS.
If customer would like to support the feature in LSDK-20.04, it needs more effort to porting the code both in u-boot and kernel.
In chapter 3.3 of LSDK-21.08 UG, the feature support matrix, the DSPI feature didn't include LX2160A platform.

[deepanrajanbara]

Hi Yiping,

Actually we need to fix to be incoperated in LSDK 20.04. Since we are using third party drivers which will be supported only in LSDK 20.04. Please support us in bringing up the DSPI drivers for LX2160 in LSDK 20.04

[yipingwang]

I checked LSDK 20.04 Linux Kernel 4.19.90 source code, this patch wasn't applied.

[deepanrajanbara]

Hi Yiping,

We have applied the provided patch and verified in our board. But still the behavior is same as it was before.

Attaching the file for your reference

Thank you,

Deepanraj.A

[deepanrajanbara]

we are getting the below error

"wait transfer complete fail! " . What could be the cause for this issue ?

[deepanrajanbara]

Hi,

As mentioned we have configured all the setting in kernel. since our slave is connected to spi3_cs1 our dts configuration is as below

spidev@1 {
#address-cells = <1>;
#size-cells = <1>;
compatible = "rohm,dh2228fv";
spi-cpol;
spi-cpha;
reg = <1>;
spi-max-frequency = <4000000>;

}

But still we are not able to see the spi clock . Please let us know why is this observed.

Thank you,

Deepanraj.A