In the provided "uart.c" it is written:
#define uart1_base (0xff704600)
This is correct the e500 core (Power Architecture CCSR space), but not for the SC3850 (DSP Architecture View of the CCSR Space).
Please refer to the QorIQ Qonverge BSC9132 Multicore Baseband Processor Reference Manual,2.3.2 DSP Architecture View of the CCSR Space and Table 2-46. SC3850 Core 0 and DSP Architecture View of the System Address Space where it is printed:
Power Architecture CCSR area: 0xFEF0_0000 - 0xFEFF_FFFF
So UART1 base address for the SC3850 is:
0xFEF0_0000 + 0x4600 = 0xFEF04600