IMX8MP LVDS_CTRL register documentation

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IMX8MP LVDS_CTRL register documentation

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PaulGerber
Contributor II

Hello,

on our i.MX8MP-based custom board I want to increase the driver strength for LVDS signals. I've found this function in the PHY driver: https://source.codeaurora.org/external/imx/linux-imx/tree/drivers/phy/freescale/phy-fsl-imx8mp-lvds....

In this function the LVDS_CTRL register is written, which contains some promisingly looking fields, e.g. CC_ADJ. The value of this field is hard-coded to 0x2 in the driver. Unfortunately, I cannot find any documentation for this register fields in the reference manual. I know that there is some documentation in the IMX8QM reference manual for a similar register (Section 15.4.3.2.1.3). Can anyone provide some detail on the LVDS_CTRL register on IMX8MP?

Many thanks,

Paul.

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PaulGerber
Contributor II

Hello Zhiming,

I already have this document. But in section 13.2.3.1.41, where the LVDS_CTRL register is described, there is no explanation for the values and meanings for the multi-bit fields, e.g. CC_ADJ. I assume, the higher the value in the register (0x0 ... 0x7) the higher the output current. But it's only an assumption and I'd like to have some acknowledgment.

Searching for "CC_ADJ" or "LVDS_CTRL" throughout the document doesn't help either, because there are no helpful references. Am I missing some section of the RM?

Thank you,

Paul.

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Zhiming_Liu
NXP TechSupport
NXP TechSupport

LVDS_CTRL is in MEDIA BLK_CTL registers map

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PaulGerber
Contributor II

I know that LVDS_CTRL is in MEDIA BLK_CTL. What I don't know is what different values in the CC_ADJ field (bits 13-11) in the LVDS_CTRL register mean. For example, in the IMX8QM reference manual you can see in section 15.4.3.2.1.3.3, page 5270, that a value of 100b in the CA field of the LVDS_PHY_CTRL register means an output current of 3.51mA. I'd like to have a similar information for the i.MX8MP.

Thank you,

Paul.

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Zhiming_Liu
NXP TechSupport
NXP TechSupport

I searched all released files about i.MX8MPlus, there is no such information even in lvds spec description file.

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charliehotel
Contributor I

I searched all released files about i.MX8MPlus, there is no such information even in lvds spec description file.

 

We have the same question.


We'd like to have a description of CC_ADJ and  PRE_EMPH_ADJ for LVDS_CTRL.


They have an effect on EMI, but we do not want to tweak them without knowing precisely what they do.

 

We would appreciate it if you could escalate this internally.

 

There is another thread on this forum with the same question and no response.

 

Thank you,

Christopher H.

Impulse Labs.


@Zhiming_Liu    @DonaldGunn 

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PaulGerber
Contributor II

Hello again,

is there any chance to get some information about the LVDS_CTRL register? Somewhere in NXP I hope this is documented.

Regards,

Paul.

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michaelwalton
Contributor II

Hi Paul - yes we are facing the same issue.

Wanting to design around some parameters related to the LVDS signals and there is a lack of proper documentation as to what the default and adjustable parameters are.

So I second your request!

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timbeyer
Contributor I

Hi, we discovered serious EMC problems with the LVDS interface. 

Therefore, we need extensive detailed information about these register settings.

- defaults

- meaning of each bit in the field

- valid values 

@Zhiming_Liu 

Thank you for your support !

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Zhiming_Liu
NXP TechSupport
NXP TechSupport

Hi @PaulGerber 

Please download this document:

Qmiller_0-1652318571759.png

Regards

Zhiming

 

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