switching between QUICC slow and fast protocols

[m_syed_ahmed]

Hi,

We were working on LS1021-atwr. We are working in QE engine drivers. I tested UCC_UART and HDLC in 2 different ports. Our actual requirement is to have both in the same port.My questions are

1) Did switching between protocol steps are same for all the processors? Don't know how to call pushsched command in ls1021.

2) Can anyone share the steps for LS1021-atwr for switching between same protocols?

3) In which source code, do I needs to implement switching between protocols steps mentioned in QEIWRM?

[r8070z]

1) The QEIWRM provides switching between protocol steps for all processors mentioned on the title page. (Only the MSC8144/MSC815x has bit numbering feature). Notice the LS1021A QUICC engine-lite is a Big-endian block.

2) I am not sure what do you mean. The QEIWRM 6.8.5 Switching Protocols provides these steps. As code example see Example 25-1. QMC Re-Initialization Example in the QEIWRM (The QMC is a UCC slow protocol like the UART)

3) What source code do you mean? I guess you mean some Linux driver source. In any case I am not driver programmer. I have never met any driver that can support UART and HDLC on the same port.