Good Day,
We are migrating from the MPC8260 Processor to the MPC8360. On the MPC8260 we pull the RSTCONF_ pin low to place the the Processor in defualt config to allow configuration.
Is there in Pin/ signal that needs to be asserted/negated to allow programming of the MPC8360 via the COP/JTAG signals? Is there a guide available that explains the physical programming or flashing of the MPC8360 processor cia the COP/JTAG signals?
Kind Regards
The MPC8360 CFG_RESET_SOURCE[0:2] pins is analog of the MPC8260 RSTCONF pin. These pins select reset configuration word source. Correct operation of the JTAG interface requires configuration of a group of system control pins as described and demonstrated in the Design Checklist document
https://www.nxp.com/docs/en/application-note/AN3097.pdf
See section " JTAG and Debug ". The JTAG test interface (based on IEEE 1149.1) provides a means for boundary-scan testing of the core and the attached system logic. The hardware debug function accesses the JTAG test port, providing a
means for executing test routines and facilitating chip and software debugging. As guide see for example Hardware Debugging Using the CodeWarrior™ IDE document
Yes as I wrote the MPC8360 CFG_RESET_SOURCE[0:2] are like the MPC8260 RSTCONF.
There are guide for the tools which can program a local bus SRAM/Flash via the Powerquicc only. These tools use the JTAG/COP interface. Special COP protocol used to Displaying Memory and Registers like in the AN3830 it also permit download code and program Flash connected to the MPC8360. So the CodeWarrior™ includes FLASH programmer.