Hello,
Since there is no DIP switch on the P1020WLAN Rev. D board, we appreciate to know how the board can be boot by a SD card (SDHC). Note that we have done all the steps mentioned in the document called Booting from On-Chip ROM (eSDHC or eSPI) for P1020 family and we have the SD card ready . But, it seems we need to change cfg_rom_loc[0:3], which seems impractical on this board. Thank you for your comments.
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Hi Arashaz,
The default support boot mode is NOR flash on P1020WLAN. There is no DIP switch to change boot mode to SD boot.
But there is a workaround to rework the board to support SD. Change cfg_rom_loc[0:3]=0111. Only populate R108.
Below figure show the layout location for R108.
Hi Arashaz,
The default support boot mode is NOR flash on P1020WLAN. There is no DIP switch to change boot mode to SD boot.
But there is a workaround to rework the board to support SD. Change cfg_rom_loc[0:3]=0111. Only populate R108.
Below figure show the layout location for R108.
Thank you Fulian.
There are two mandatory changes to be done in hardware to boot from sdcard from P1020Wlan board.
1. Populating R108 on Cfg_rom_loc[0] pin.
2. unpopulating R89 from cfg_sdhc_cd_pol_sel.
Hi Arashaz,
Take a look in PORBMSR register (in ROM_LOC field more exactly) to see which is right now the default rom_location set it up now by the FPGA code (having no DIP SW on the board is pretty sure that the cfg_rom_loc is driven by FPGA).
You can't use PMUXCR register from software (this is fully focus on soc level muxing, not for POR stuff which are read-only).
Basically, you have 2 options:
1. use the flash/boot method suggested by cfg_rom_loc from PORBMSR........or
2. update the FPGA to use your specific cfg_rom_loc (I'm not familiar with FGPA code -- maybe a hardware guy can help on this side).
Regards,
Marius
Hello,
Thank you very much Marius. It was very useful.
Just to note that I found a set of 4 DIP switches called SW2 on the P102WLAN board, but it seems they are not related. I tested all possibilities and there was no change in the boot process.
Just to make sure, by FPGA, do you mean the CPLD code?
Regards,
Arash
Hi Arash,
Yes, FGPA means CPLD code.
Regards,
Marius