SGTL5000XNAA3 mic in trouble

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SGTL5000XNAA3 mic in trouble

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DavidLee1234
Contributor I

Hello,

I use the CODEC SGTL 5000 and I set it like the schematics below.

i use the NVIDIA JETSON XAVIER NX MODULE kernel.

DavidLee1234_2-1660897412466.png

The audio codec doesn't work when i pulg in and unplug audio jeck.

and same trouble below

https://mailman.alsa-project.org/pipermail/alsa-devel/2016-May/108072.html

pls, inform this solution asap.

 

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diazmarin09
NXP TechSupport
NXP TechSupport

Hello David,

I hope al is great with you.

First, I would like to recommend the following device configuration as a reference for your design.

Could you please confirm that you are using the same configuration?

diazmarin09_0-1660943768982.png

 

Please note that the SGTL5000XNAA3 device is obsolete, you may consider it for your further designs.

Regards,

David

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DavidLee1234
Contributor I

Hello Diazmarin,

Thank you for ur reply.

I follow ur  configuration but same trouble.

if you have the other solution, pls inform again.

 

Best Regards,

Diazmarin

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diazmarin09
NXP TechSupport
NXP TechSupport

Hello David,

Thank you for using the NXP communities. It is our pleasure.

Could you please make sure your device is not related to the errata below? I noticed that your device might be included. Are you able to address the device correctly?

SGTL5000 Silicon Errata

Have you considered using the SGTL5000XNBA3 device?

Regards,

David

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DavidLee1234
Contributor I

Hello diazmarin

My sechematic design also used external regulator.

pwr_3v3 also used p# ltm4644 pwr regulator.

VDDIO, VDDA, VDDD power is good.

When the audio jack is connected, the audio codec operates normally.

However, when i unflug the MIC jack and then flug in again under normal conditions, the audio codec does not work from reboot.

if you have the other solution, pls inform again.

DavidLee1234_0-1661302844066.png

Best Regards,

Diazmarin

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diazmarin09
NXP TechSupport
NXP TechSupport

Hello David,

Please review my recommendations below:

  1. From the supply voltage, could you please make sure that VDDIO/VDDA are supplied before the VDDD? The preferred supply sequencing is VDDIO/VDDA (doesn’t matter which comes first) and then VDDD.
  2. Once again, I do recommend using the SGTL5000 Evaluation Platform as a reference for your design. Please find the schematic attached. Is the rest of your design within the recommended configuration?
  3. Just as a comment, your C147 is 1uF. We do recommend adding a 0.1uF. Have you tried to replace such capacitor?
  4. Do you have the same issue removing the ferrite?

Regards,

David

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