PN7462 SPI Communication

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PN7462 SPI Communication

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amolborase
Contributor II

Dear all,

We are working on PN7462 based product. For development we are using MCUXpresso IDE v10.2.0_759, Debugger LPC Link-2 and software example PN7462AU_ex_phExHif of version v05.07.01 with some modification to implement SPI as a Slave and other microcontroller we are using as a Master.

when we are sending data from Master to PN7462, So in slave side sometimes it receives 0, otherwise it goes into function "Wait for Event" and on MISO pin of Slave. We have tried continuously sending single byte data with small delay in between two consecutive requests.

We have connected SPI pins of slave like this (As per document UM10858):
ATX_A - NSS
ATX_B - MOSI
ATX_C - MISO
ATX_D - SCK

Code :

int main(void)
{
      uint8_t bCount, pwLength=0,eStatus=0,bHifSelection=0;

      phFlashBoot_Main();

      bHifSelection = PH_REG_GET_FIELD(PCR_SYS_REG,HIF_SELECTION);

      /** Configure IRQ and Data ready ping to LOW on bootup*/
      // PH_REG_CLEAR_BIT(PCR_PADOUT_REG, PADOUT_IRQ);
      // PH_REG_SET_BIT(PCR_PADOUT_REG,PADOUT_IRQ);

      // /** Configure the Data Ready pin as OUTPUT */
      // PH_REG_SET_BITN(PCR_PADGPIO1_REG,
      // PCR_PADGPIO1_REG_GPIO1_EN_OUT_POS);

      // /** De-Assert the Data Ready pin.*/
      // PH_REG_CLEAR_BIT(PCR_PADOUT_REG, PADOUT_GPIO1);

      /*Configuring GPIO's 4,5,6,7,8 as Inputs*/
      // for(bCount = 4 ; bCount < 9 ;bCount ++)
      // {
      // phhalPcr_ConfigPuPd(bCount,false,true);
      // phhalPcr_ConfigInput(bCount,true,false,false,false,true,false);
      // }

      /* Create the Event group for HIF transactions */
      gphExHif_Hw_HifEvents = phRtos_EventGroupCreate();

      /* Execute the Hif Application */
      phExHif_HifTask();

      return 0;
}

static void phExHif_HifTask(void)

{
      uint16_t wLength;
      phStatus_t eStatus;
      uint8_t bCommChannel = 2,temp[256]={0},i=0;
      uint8_t bHifInterface = 2;
      gphExHif_Hw_Ct_Init = false;

      phhalPcr_ConfigOutput(4, true,false);
      phhalPcr_ConfigOutput(5, true,false);
      // if ((PH_EXHIF_HW_GET_GPIO_VAL(PH_EXHIF_HW_GPIO_IN_PORT_L)
      // | PH_EXHIF_HW_GET_GPIO_VAL(PH_EXHIF_HW_GPIO_IN_PORT_H))) {
      // LOG_TXT("Waiting for activity on HIF SEL PINS\n");
      // }

      /* Used for synchronisation between Master(LPC1769) and Slave(PN7462AU).
      * Wait till all the Ingress GPIO ports go LOW
      */
      // while ((PH_EXHIF_HW_GET_GPIO_VAL(PH_EXHIF_HW_GPIO_IN_PORT_L)
      // | PH_EXHIF_HW_GET_GPIO_VAL(PH_EXHIF_HW_GPIO_IN_PORT_H)));

      bHifInterface = phExHif_Hw_InPort_Init();

      while (1)
      {

            eStatus = PH_ERR_SUCCESS;

            // phLED_SetStatus(LED_B);
            /** Read the Hif-Interface Gpio configs and Wait until Ingress ports NOT Equal to Zero */
            // while (!(PH_EXHIF_HW_GET_GPIO_VAL(PH_EXHIF_HW_GPIO_IN_PORT_L)
            // | PH_EXHIF_HW_GET_GPIO_VAL(PH_EXHIF_HW_GPIO_IN_PORT_H)));

            // PH_HAL_GPIO_SETGPIOVAL(4,true);
            // for(i=0;i<0xFFF;i++);
            // PH_HAL_GPIO_SETGPIOVAL(4,false);

         do

         {
                 /** Initialize the Hif hardware. */

                 /** OutPort Initialization */
                // bCommChannel = phExHif_Hw_OutPort_Init();

                // PH_REG_SET_BIT(PCR_PADOUT_REG, PADOUT_GPIO1);

               /** Receive data over the HIF interface */
               eStatus = phExHif_Hw_HostInterface_Receive(&wLength);

               if(gphExHif_Hw_RxBuffer[0]==0x5A)
               {
                     PH_HAL_GPIO_SETGPIOVAL(4,true);
                     // temp[i++] = gphExHif_Hw_RxBuffer[0];
               }

               TxBuffer[0] = 0xAB;
               wLength = 1;

/** Forward the received packets to selected communication channels. */


            eStatus = phExHif_Hw_Transmit(bCommChannel, bHifInterface, wLength,(uint32_t *) TxBuffer);

            if (eStatus != PH_ERR_SUCCESS)
            {
                  PH_HAL_GPIO_SETGPIOVAL(5,true);
            }

            // /** Output Port De-Initialization */
            eStatus = phExHif_Hw_DeInit(bCommChannel);

            PH_HAL_GPIO_SETGPIOVAL(5,false);
            PH_HAL_GPIO_SETGPIOVAL(4,false);
            /** De-Assert the Data Ready pin for synchronization. */
            // PH_REG_CLEAR_BIT(PCR_PADOUT_REG, PADOUT_GPIO1);

            /** For synchronization,Wait till all the Ingress GPIO ports go LOW to ensure a transaction is complete */
            // while ((PH_EXHIF_HW_GET_GPIO_VAL(PH_EXHIF_HW_GPIO_IN_PORT_L)
            // | PH_EXHIF_HW_GET_GPIO_VAL(PH_EXHIF_HW_GPIO_IN_PORT_H)))
            // ;
    } while (0);
   }

}

Observations :

1) We are getting constant 4V on MISO pin. We are not sure why it is 4 V instead of 3.3 V.
2) PN7462 is rarely able to detect receive interrupt, even when we are sending 1 byte of data every 50 mSecs.
3) Whenever we get receive interrupt in PN7462, the length of received data changes randomly. Also under such circumstances, we get 0 in receive buffer of PN7462 irrespective of what data has been sent from the master.

Please guide us to resolve the problem

Thanks in advance,

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tommyb90
Contributor III

Hi to everyone,
I just started a project with the PN7462; in this case the uC must be interfaced via HIF configured as slave SPI.

I managed to communicate in SPI correctly, but only on the MOSI pin. I cannot get the MISO PIN to transmit other than FF. The chip is ALL supplied at 3,3V and voltage seems to be correct on the output pin.

I tried configuring (forcing the internal variables) the HIF example to be used with SPI slave and in loopback, but the pin is not moving even using this code.

Could you share the configuration code that worked for you?

Thank you in andvance!

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IvanRuiz
NXP Employee
NXP Employee

Hello,

It sounds to me a Hardware problem. Could you please attach the schematics?

Regards,

Ivan.

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6,491件の閲覧回数
amolborase
Contributor II

Dear Ivan,

We have make changes in baud rate and now PN7462 able receive data from Master but is unable to transmit to the Master. We are always getting 0 at Master side as shown in attached waveform, we still getting 4V instead of 3.3V. We want to know that ,Is there any special sequence or any configuration/initialization process to transmit data from PN7462(slave) to Master. If any please guide us for the same and anything other than that please suggest us.

Thanks for reply,

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IvanRuiz
NXP Employee
NXP Employee

Hi Amol Borase,

Could you please let us know the voltages at vdd of the master and slave? This might be caused because of this.

Regards,

Ivan.

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6,491件の閲覧回数
amolborase
Contributor II

Dear Ivan,

Vdd used for Master and Slave is 5V.

Thanks,

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amolborase
Contributor II

Hello Ivan ,

We are still facing the same issue and we are waiting for response, so please help us. Please let us know for any further details.

Thank you,

Regards,

Amol Borase.

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