What is the highest frequency of interrupts that MQX can handle?(maximum interrupts in 1ms)

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What is the highest frequency of interrupts that MQX can handle?(maximum interrupts in 1ms)

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sumitnandi
Contributor I

I am working with an MQX based application(legacy). It already has 1ms timer interrupt to capture some data.

I want to implement #ADC triggered through PDB but not using DMA to process some coil current. I need minimum of 16 samples in a period of 5ms, this evaluates to ADC trigger at every 312.5 usec. This will lead to ADC interrupt every 312.5 usec.

My problem is am not able to debug my code with above mentioned settings, i.e. i am not getting halts at my breakpoint in ADC interrupt routine. If i change the frequency of trigger to ADC to 500usec(again through PDB only) i get regular halts in ADC routine...Through this i have a conclusion that below 500 usec ADC interrupts are not being processed.

Is my conclusion right? or i am missing something here.

It would be helpful using only PDB  and no DMA. Let me know if DMA is an absolute necessity.

Please help!

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danielchen
NXP TechSupport
NXP TechSupport

Hi Sumit:

I am afraid that the ADC driver of MQX is not able to sample like bare mental does. Because the default TICK timer period is 5ms. But there is a way to bypass the MQX kernel to have  a high sample rate. It will be required to add a bare mental ADC driver inside MQX RTOS, and bypassing the ADC interrupt from MQX for using the "bare mental" ADC interrupt.

You can use _int_install_kernel_isr to bypass MQX and let the interrupt be serviced immediately. A kernel ISR cannot call MQX functions. However, it can put data in global variables, which a task can access. The disadvantage on this is shared data problem and you can impact the kernel  if the restoring stack fails.

Regards

Daniel

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