Dear:
I am using ETPU to acquire crankshaft and cam signals. I use ETPUA0 channel to acquire crankshaft signal and ETPUA1 channel to acquire cam signal. My initialization of the ETPU is as follows:
struct etpu_config_t my_etpu_config =
{
FS_ETPU_VIS_OFF /* SCM not visible (VIS=0) */
| FS_ETPU_MISC_DISABLE /* SCM operation disabled (SCMMISEN=0) */,
/* etpu_config.misc */
FS_ETPU_MISC,
/* etpu_config.ecr_a */
FS_ETPU_ENTRY_TABLE_ADDR /* entry table base address = shifted FS_ETPU_ENTRY_TABLE */
| FS_ETPU_FCSS_DIV2 /* channel filter clock source using FPSCK divider */
| FS_ETPU_CHAN_FILTER_2SAMPLE /* channel filter mode = two-sample mode (CDFC=0) */
| FS_ETPU_ENGINE_ENABLE /* engine is enabled (MDIS=0) */
| FS_ETPU_FILTER_CLOCK_DIV2 /* channel filter clock = etpuclk div 2 (FPSCK=0), see also FCSS if using eTPU2 */
| FS_ETPU_PRIORITY_PASSING_ENABLE /* Scheduler priority passing enabled (SPPDIS=0) */,
/* etpu_config.tbcr_a */
FS_ETPU_ANGLE_MODE_ENABLE /* TCR2 works in angle mode, driven by TCRCLK input and ch.0 (AM=1) */
| FS_ETPU_TCR2_PRESCALER(1) /* TCR2 prescaler = 1 (TCR2P='1-1') */
| FS_ETPU_TCR1_PRESCALER(8) /* TCR1 prescaler = 8 (TCR1P='3-1') */
| FS_ETPU_TCRCLK_INPUT_DIV2CLOCK /* TCRCLK signal is filtered with filter clock = etpuclk div 2 (TCRCF=x0) */
| FS_ETPU_TCR2CTL_FALL /* TCR2 source = fall TCRCLK transition (TCR2CTL=2) */
| FS_ETPU_TCRCLK_MODE_2SAMPLE /* TCRCLK signal is filtered using two-sample mode (TCRCF=0x) */
| FS_ETPU_TCR1CS_DIV1 /* TCR1 source using TCR1CTL divider */
| FS_ETPU_TCR1CTL_DIV2 /* TCR1 source = etpuclk div 2 (see also TCR1CS if using eTPU2) */,
/* etpu_config.stacr_a */
FS_ETPU_TCR1_STAC_SERVER /* TCR1 resource operates as server (RSC1=1) */
| FS_ETPU_TCR2_STAC_SERVER /* TCR2 resource operates as server (RSC2=1) */
| FS_ETPU_TCR1_STAC_DISABLE /* TCR1 operation on STAC bus disabled (REN1=0) */
| FS_ETPU_TCR2_STAC_DISABLE /* TCR2 operation on STAC bus disabled (REN2=0) */
| FS_ETPU_TCR1_STAC_SRVSLOT(0) /* TCR1 resource server slot = 0 (SRV1=0) */
| FS_ETPU_TCR2_STAC_SRVSLOT(0) /* TCR2 resource server slot = 0 (SRV2=0) */,
/* etpu_config.ecr_b */
FS_ETPU_ENTRY_TABLE_ADDR
| FS_ETPU_FCSS_DIV2
| FS_ETPU_CHAN_FILTER_2SAMPLE
| FS_ETPU_ENGINE_ENABLE
| FS_ETPU_FILTER_CLOCK_DIV2
| FS_ETPU_PRIORITY_PASSING_ENABLE,
/* etpu_config.tbcr_b */
FS_ETPU_ANGLE_MODE_ENABLE
| FS_ETPU_TCR2_PRESCALER(1)
| FS_ETPU_TCR1_PRESCALER(8)
| FS_ETPU_TCRCLK_INPUT_DIV2CLOCK
| FS_ETPU_TCR2CTL_DIV8
| FS_ETPU_TCRCLK_MODE_2SAMPLE
| FS_ETPU_TCR1CTL_DIV2,
/* etpu_config.stacr_b */
FS_ETPU_TCR1_STAC_SERVER
| FS_ETPU_TCR2_STAC_SERVER
| FS_ETPU_TCR1_STAC_DISABLE
| FS_ETPU_TCR2_STAC_DISABLE
| FS_ETPU_TCR1_STAC_SRVSLOT(0)
| FS_ETPU_TCR2_STAC_SRVSLOT(0),
/* etpu_config.wdtr_a */
FS_ETPU_WDM_DISABLED /* Watchdog Mode = disabled (WDM=0) */
| FS_ETPU_WDTR_WDCNT(0) /* watchdog count in microcycles */,
/* etpu_config.wdtr_b */
FS_ETPU_WDM_DISABLED /* Watchdog Mode = disabled (WDM=0) */
| FS_ETPU_WDTR_WDCNT(0) /* watchdog count in microcycles */
};
The ETPU CLK is 80MHz。 So we can get tcr1_freq and tcr2_freq as:
uint32_t etpu_a_tcr1_freq = 10000000;
uint32_t etpu_a_tcr2_freq = 10000000;
uint32_t etpu_b_tcr1_freq = 10000000;
uint32_t etpu_b_tcr2_freq = 10000000;
If I keep the above configuration.I can correctly capture the cam signal, but not the crank signal.If I change FS_ETPU_ANGLE_MODE_ENABLE to FS_ETPU_ANGLE_MODE_DISABLE.The crank signal can be acquired correctly.However,i need angular clock.Please give me some help and advice, thank you sincerely.
respectly
