The MCU is MPC5634. After configuration of TLB1 entry 1, the program can not run normally!!! The code is as followed. When i delete TLB entry 1 configuration code, the program can run normally!! Why?😖

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The MCU is MPC5634. After configuration of TLB1 entry 1, the program can not run normally!!! The code is as followed. When i delete TLB entry 1 configuration code, the program can run normally!! Why?😖

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增强祝
Contributor II

The MCU is MPC5634. After configuration of TLB1 entry 1, the program can not run normally!!! The code is as followed. When i delete TLB entry 1 configuration code, the program can run normally!! Why?

__asm void MMUTLB_init(void)

{

 

 /*configure TLB entry 1,start from 0x0000 8000,4MB*/

 lis   r3, 0x1001      /* Select TLB entry 1, define R/W replacment control */

 ori   r3, r3, 0x0000  /* clear the low 16bits of r3*/

 mtMAS0 r3              /* Load MAS0 with 0x1001 0000 for TLB entry 1*/

 

 lis   r3, 0xC000      /* Define description context and configuration control: */

 ori   r3, r3, 0x0600  /* VALID=1, IPROT=1, TID=0, TS=0, TSIZE=0110 (4MB size) */

 mtMAS1 r3              /* Load MAS 1 with 0x8000 0600 */

 

 lis   r3, 0x0000      /* Define EPN and page attributes: */

 ori   r3, r3, 0x8000  /* VLE=0*/

 mtMAS2 r3              /* EPN = 0x0000 8000, WIMAGE = all 0's */

                         /* Load MAS2 with 0x0000 8000 */ 

 lis   r3, 0x0000      /* Define RPN and access control for data R/W */

 ori   r3, r3, 0x803F  /* RPN = 0x0000 0000, U0:3=0, UX/SX=1, UR/SR/UW/SW=1 */

 mtMAS3 r3              /* Load MAS3 with 0x0000 800F */             

 

 tlbwe                  /*load the TLB entry*/

 /*configure TLB entry 6,0x0000 4000-0x0000 8000*/

 lis   r3, 0x1006      /* Select TLB entry 6, define R/W replacment control */

 ori   r3, r3, 0x0000  /*clear the low 16bits of r3*/

 mtMAS0 r3              /* Load MAS0 with 0x1006 0000 for TLB entry 1*/

 

 lis   r3, 0xC000      /* Define description context and configuration control: */

 ori   r3, r3, 0x0200  /* VALID=1, IPROT=0, TID=0, TS=0, TSIZE=0010 (16KB size) */

 mtMAS1 r3              /* Load MAS 1 with 0x8000 0200 */

 

 lis   r3, 0x0000      /* Define EPN and page attributes: */

 ori   r3, r3, 0x4000  /* EPN = 0x0000 4000, WIMAGE = all 0's */

 mtMAS2 r3              /* Load MAS2 with 0x0000 4000 */

 

 lis   r3, 0x0000      /* Define RPN and access control for data R/W */

 ori   r3, r3, 0x403F  /* RPN = 0x0000 4000, U0:3=0, UX/SX=0, UR/SR/UW/SW=1 */

 mtMAS3 r3              /* Load MAS3 with 0x0000 400F */             

 

 tlbwe                  /*load the TLB entry*/

 /*configure TLB entry 7,0x0000 0000-0x00004000*/

 lis   r3, 0x1007      /* Select TLB entry 7, define R/W replacment control */

 ori   r3, r3, 0x0000  /*clear the low 16bits of r3*/

 mtMAS0 r3              /* Load MAS0 with 0x1007 0000 for TLB entry 1*/

 

 lis   r3, 0xC000      /* Define description context and configuration control: */

 ori   r3, r3, 0x0200  /* VALID=1, IPROT=0, TID=0, TS=0, TSIZE=0010 (16KB size) */

 mtMAS1 r3              /* Load MAS 1 with 0xC000 0200 */

 

 lis   r3, 0x0000      /* Define EPN and page attributes: */

 ori   r3, r3, 0x0000  /* EPN = 0x0000 0000, WIMAGE = all 0's */

 mtMAS2 r3              /* Load MAS2 with 0x0000 0000 */

 

 lis   r3, 0x0000      /* Define RPN and access control for data R/W */

 ori   r3, r3, 0x003F  /* RPN = 0x0000 0000, U0:3=0, UX/SX=0, UR/SR/UW/SW=1 */

 mtMAS3 r3              /* Load MAS3 with 0x0000 000F */             

 

 tlbwe                  /*load the TLB entry*/

 

}

after debug, I found the TLB1 entry0 has been changed ,but the code didn't change it. Details are as folllows.

微信图片_20200608194048.jpg

捕获.JPG

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davidtosenovjan
NXP TechSupport
NXP TechSupport

Hi, I would answer general way.

After reset MMu is being configured by BAM as shown below. Note that BAM is basically executable code, thus just after reset you will not see configuration below but after several instructions MMU is configure as follows: 

pastedImage_18.png

If you want to erase or change any of entry, you must guarantee in every step, there is no conflict between entries and there is no access to certain region in the moment it is undefined.

Also tlbwe instruction must be followed by isync instruction to prevent context altering issues what I dont see in the code you shown in your thread content.

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