Stack usage evaluation of mpc5746r

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Stack usage evaluation of mpc5746r

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Anony
Contributor II

Hello,

How to evaluate the use of MCU stack in the program, such as monitoring the percentage of used stack in the whole stack space.The chip I use is mpc5746r.Is there any relevant implementation experience for reference?

Thank you very much!

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lukaszadrapa
NXP TechSupport
NXP TechSupport

I was used to do that completely via a debugger, not in a code. I just run the code to main (because there's code for RAM initialization in startup codes, which writes all the RAM), then I checked current state of R1 and I filled the rest of the stack.

Mentioning of RAM initialization leads me to another idea - RAM is initialized by stmw instruction when all 32 general purpose registers R0-R31 are written to RAM at once. So, the RAM content is defined, in fact. At the beginning, you will see that the stack is filled by these repeating 32 words... So, it should be quite visible where the data are overwritten... Or you can modify the startup code and initialize GPRs with some value before RAM initialization. If I can remember, R3 and R4 are used for the loop, so these will be changing...

Core registers are not memory mapped, the only option to access them is an asm instruction.

Regards,

Lukas

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lukaszadrapa
NXP TechSupport
NXP TechSupport

Hi,

there are more options:

1. see section "64.4 Using Debug Resources for Stack Limit Checking" in the reference manual:

https://www.nxp.com/webapp/Download?colCode=MPC5746RRM

There are some discussions on the community, maybe it will help:

https://community.nxp.com/t5/MPC5xxx/MPC5744P-how-to-use-the-debug-registers-to-realize-the-quot/m-p...

2. Simple method to find out the sufficient stack size (High-Water Mark method):
Reset the microcontroller by debugger and go to main function. Now fill the stack with some characters like 0xAA. Now run the code and check the address where characters 0xAA are not overwritten by stack.  Make sure you exercise as many different paths through the code as possible. Based on the reported high water mark you can then adjust your stack allocation accordingly (add adequate safety margin to ensure the stack cannot overflow).

3. You can also use memory protection unit (there's either core MPU or system MPU) - configure area right below the stack as "no write". If the core goes to write this area, machine check will be triggered.

Regards,

Lukas

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Anony
Contributor II

Hello Lukas,

Thank you very much for your reply!

1.I read their discussion,it's not exactly the same as what I've achieved. The method of debugging does not meet my requirements. I want to use 0XAA to fill the stack space after the program runs, and then evaluate the stack usage through the coverage of 0XAA. I found a problem. The starting address of the stack is not fixed. How can I make the starting address of the stack a fixed address?

2.There is another question. If you want to fill the stack space, must it be before the main function? Is it intelligently implemented in assembly language? Is there a C language implementation?

3.Also, I see that a register R1 is the address of the stack pointer. Can I get the contents of this register through C code? I didn't find it in the user manual. I hope to get your advice

Regards!

 

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lukaszadrapa
NXP TechSupport
NXP TechSupport

I was used to do that completely via a debugger, not in a code. I just run the code to main (because there's code for RAM initialization in startup codes, which writes all the RAM), then I checked current state of R1 and I filled the rest of the stack.

Mentioning of RAM initialization leads me to another idea - RAM is initialized by stmw instruction when all 32 general purpose registers R0-R31 are written to RAM at once. So, the RAM content is defined, in fact. At the beginning, you will see that the stack is filled by these repeating 32 words... So, it should be quite visible where the data are overwritten... Or you can modify the startup code and initialize GPRs with some value before RAM initialization. If I can remember, R3 and R4 are used for the loop, so these will be changing...

Core registers are not memory mapped, the only option to access them is an asm instruction.

Regards,

Lukas

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