Hello everybody,
I'm working on S32R274 and I want to set the PLL with the following setup:
To do that I should properly set the following registers:
And then check ME_GS to see if the setup was activated.
My questions are:
Thanks in advance for the help!
Hi,
1. the memory map is given within Excel sheet attached to the Reference Manual.
From this you can find base address of MC_CGM as 0xFFFB0000 and FM_PLL (PLLDIG) offset addres w.r.t MC_CGM as 0x100. Thus base address of PLLDIG will be 0xFFFB0100.
2. for a clock setting code you can refer to some demos posted here :https://community.nxp.com/docs/DOC-329623#S32R274
It does not set to run PLL from IRC, but you can do little modification if needed.
BR, Petr
Hello Petr,
thanks a lot for your reply, I just found that into the excel file.
It's a bit tricky because for similar devices you use a different style to define the address of the PLLDIG.
One last question: should I also set the FT_DIS bit to 1 for all the RAM controllers when setting the frequency so high, like 160MHz?
Thanks