PBRIDGE clock must be half of the slow bar for MPC5745R???

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PBRIDGE clock must be half of the slow bar for MPC5745R???

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umsteigen
Contributor II

I use MPC5745R as the main microcontroller.

A 20MHz oscillator is used and 150MHz CPU frequency is then set. 

The following code runs correctly.

/************************************************************************************/

/************************************************************************************/
MC_CGM.AC3_SC.B.SELCTL=1; /*PLL0 uses an external oscillator*/
MC_CGM.AC4_SC.B.SELCTL=3; /*PLL1 source is PLL0 PHI1*/


/*20MHz XOSC->160MHz PLL0 PHI*/
/*
PLL0 PHI=Ref/(PREDIV*RFDPHI)*MFD
*/
PLLDIG.PLL0DV.B.RFDPHI = 2;
PLLDIG.PLL0DV.B.PREDIV = 1;
PLLDIG.PLL0DV.B.MFD = 16; /*8->127*/

/*
VCO_PLL0=Ref_PLL0*MFD*2/PREDIV
VCO_PLL0=20MHz*16*2/1=640MHz
*/

/*20MHz XOSC->40MHz PLL0 PHI1*/
/*
PLL0 PHI1=Ref/(PREDIV*RFDPHI1)*MFD
*/
PLLDIG.PLL0DV.B.RFDPHI1 = 8; /*4->15*/

/*40MHz PLL0 PHI1->150MHz PLL1 PHI*/
/*
PLL1 PHI=Ref*MFD/(RFDPHI*2)
*/
/*
VCO_PLL1=Ref_PLL1*MFD
VCO_PLL0=40MHz*30=1200MHz
*/
PLLDIG.PLL1DV.B.RFDPHI = 4;
PLLDIG.PLL1DV.B.MFD = 30;


/*System Clock Selector*/
MC_CGM.SC_DC[0].R = 0x80000000; /*FXBAR=150MHz*/
MC_CGM.SC_DC[1].R = 0x80010000; /*SXBAR=75MHz*/
MC_CGM.SC_DC[2].R = 0x80030000; /*PBRIDGE=37.5MHz*/

/************************************************************************************/

/************************************************************************************/

 

But if I change the PBRIDGE clock to 50MHz as following:

MC_CGM.SC_DC[2].R = 0x80020000; /*PBRIDGE=50MHz*/

 

Then my code runs wrong!!!

 

I don't why!

 

THe PBRIDGE clock must be half of the slow bar???

 

Thank you.

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martin_kovar
NXP Employee
NXP Employee

Hi,

please look at the following table from reference manual.

pastedImage_2.png

This table shows, that PBRIDGE frequency has to be one quarter of system frequency (FXBAR_CLK).

Regards,

Martin

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martin_kovar
NXP Employee
NXP Employee

Hi,

please look at the following table from reference manual.

pastedImage_2.png

This table shows, that PBRIDGE frequency has to be one quarter of system frequency (FXBAR_CLK).

Regards,

Martin

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umsteigen
Contributor II

Ok. 

I only noticed the table 22-2 in the reference manual and ignored this table 22-3.

Thank you very much.

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