MPC5777C Flexcan Module

[gurumurthykola]

Hello,

I am working with MPC5777C controller and observed an issue in FlexCAN-A module.

Issue,

FlexCAN-A is put into freeze mode automatically when the CODE filed of Message buffer[0] is written with the value 0b1100 for transmitting a CAN frame.

Please find attched snapshot of Flexcan-A registers.

As per the attached register map,

The flag ERRSR[FANCEIF] is set. This is causing FlexCAN-A to go Freeze Mode as MECR[NCEFAFRZ] is set.

Please let me know why the flag FANCEIF is set and what are the actions causing this flag to set.

Also Please let me know how to disable the Error Detection and Correction module. If I disable this module what are the consequence effects?

Thanks in Advance.

Best Regards,

Gurumurthy K

[Himenez]

Hi,

i'm approach now at MPC5777C (i've worked with MPC5566 and MPC5674) and i've the same that you've encountered.

In your picture you've (as me): ???????? for CAN_A_RXxxMASK and this is a problem that generate CAN_A_RERRAR.

As you i don't know how fix this problem, but you've encountered this problem many month ago......., now you've found the solution?

[PetrS]

Hi,

The MPC57xx FlexCAN supports detection and correction of errors in memory read accesses.

FANCEIF indicates that a non-correctable error was detected in a memory access initiated by FlexCAN internal processes.  The ECC error may have occurred due to module not being initialized properly.  Refer to section 40.6.1 in the Reference Manual. 

The ECC feature can be disabled by setting bit ECCDIS in CAN_MECR.  Note that bit ECRWRDIS in the same register prevents writes to the register unless it is cleared first.  Disabling ECC does not impact the normal operation of the FlexCAN. 

BR, Petr