Hi,
We are in the process of allocating the CPU pins of our board. We want to use the following EBI CS:
CS0: 32bits muxed
CS1: 16bits non-muxed
CS2: 16bits non-muxed
CS3: 32bits muxed
We also want to use TEA signal.
1) We don't see how CS2 can be used in muxed mode since the same pin is used both for CS2, Addr31 and Data31...
2) Can we used both CS3 and TEA? It seems not since they are on the same pin.
3) Would it be possible to use CS0 and CS1 to drive 4 chips selects through an external decoder?
We do not understand why there are such constraints limitating the use of EBI module...
Thanks!
Étienne
Solved! Go to Solution.
Hi, in such configuration I see significant issue I am describing here, section 7:
As it is routed same way on MPC5777C, using of muxed and non-muxed mode is not the best way. However you can always use muxed mode, can't you? Combination of muxed 16-bit and muxed 32-bit is not an issue.
1) It is basically the same case - D_CS2 is the primary function. Secondary function is EBI data only in non-mux mode and address/data in mux mode. You can use D_CS2 as chip select only for 'Non-muxed 16-bit mode' (because in this case you don't need Address 31) or 'Muxed 16-bit mode (EBI_MCR[D16_31]=0)'
2) No, it is again the same problem.
3) No, it is not possible.
Hi, in such configuration I see significant issue I am describing here, section 7:
As it is routed same way on MPC5777C, using of muxed and non-muxed mode is not the best way. However you can always use muxed mode, can't you? Combination of muxed 16-bit and muxed 32-bit is not an issue.
1) It is basically the same case - D_CS2 is the primary function. Secondary function is EBI data only in non-mux mode and address/data in mux mode. You can use D_CS2 as chip select only for 'Non-muxed 16-bit mode' (because in this case you don't need Address 31) or 'Muxed 16-bit mode (EBI_MCR[D16_31]=0)'
2) No, it is again the same problem.
3) No, it is not possible.
Yes, in my case I would move the 16bits CS to muxed mode. But wouldn't I lose performance?
Also, just to understand, the problem with mixing muxed and non-muxed CS is about D_ADD and D_ADD_DAT pins which have an excludive PCR setting, right? All the other pins would support that.
There will be minimal performance impact as address multiplexing access only add 1 cycle to small accesses. All other accesses have the same length as address is placed onto data bus when /TS line is asserted (in non-muxed there is a dead cycle there).
Yes, problem is only that muxed addr/data lines and non-muxed address lines are routed to the same pins and their functionality are being selected by particular PCR register setting (primary or alternative function).
Software workaround would be to reconfigure PCR regs before every access to non-muxed memory and
after access change PCR regs back i.e. 16 PCR writes before access and 16 PCR writes after access.
Surely better solution would be to use muxed access for all device connected to EBI, besides you have already installed latch devices on the board..