[MPC5748G] Reset vectors of CPU1 and CPU2 in the boot header.

[travis_kuo]

HI,

I did some experiments on the startup of multi-core app. The results show the CPU1 and CPU2 are brought up by CPU0 with the code below (SystemInit()). The boot-header settings do not have any effect on CPU1 and CPU2 .See Test #1 and Test #2 below.

My question: if the test results are expected, are the settings for CPU1 and CPU2 still required in boot-header? If yes, please let me know the use-case/scenario. This is related to our boot-loader development.

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Test #1: Set boot-header to single core CPU0 only with only CPU0 reset vector specified and boot header configuration set to 0x005a0002. Result: the other 2 cores are brought up and run as expected.

Test #2: Set boot-header to 3 cores with 3 reset vector specified and boot header configuration set to 0x005a000B. In addition I commented out the code for CPU1 and CPU2 in SystemInit(). Result: the CPU1 and CPU2 don't run.

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void SystemInit(void)

{

#if defined(DEBUG_SECONDARY_CORES)

#define START_SECONDARY_CORES

#endif

#if defined(START_SECONDARY_CORES)

uint32_t mctl = MC_ME->MCTL;

#if defined(TURN_ON_CPU1)

/* enable core 1 in all modes */

MC_ME->CCTL2 = 0x00FE;

/* Set Start address for core 1: Will reset and start */

#if defined(START_FROM_FLASH)

MC_ME->CADDR2 = 0x11d0000 | 0x1;

#else

MC_ME->CADDR2 = 0x40040000 | 0x1;

#endif /* defined(START_FROM_FLASH) */

#endif /* defined(TURN_ON_CPU1) */

#if defined(TURN_ON_CPU2)

/* enable core 2 in all modes */

MC_ME->CCTL3 = 0x00FE;

/* Set Start address for core 2: Will reset and start */

#if defined(START_FROM_FLASH)

MC_ME->CADDR3 = 0x13a0000 | 0x1;

#else

MC_ME->CADDR3 = 0x40080000 | 0x1;

#endif /* defined(START_FROM_FLASH) */

#endif /* defined(TURN_ON_CPU2) */

MC_ME->MCTL = (mctl & 0xffff0000ul) | KEY_VALUE1;

MC_ME->MCTL = mctl; /* key value 2 always from MCTL */

#endif /* defined(START_SECONDARY_CORES) */

}

[petervlna · Accepted solution]

Hi,

The purpose of boot header is to provide core reset vector during reset state.

So if you do not require all  3 cores execute code right after reset, then its enough for you to program boot header just for one (usually boot one).

You can later enable rest of cores in application via CADDR and mode transition.

Enabled cores cannot be disabled during run-time, only via reset. However you can halt them to reduce power consumption.

If you require all 3 cores to be on reset state exit, then program Boot header and core boot addresses accordingly.

Peter

[travis_kuo]

Yes you are right. I did a mistake on my Test #2 in previous post.