Dear supporters:
I created two project with some code. One was created by S32 Design Studio for Power Architecture Version 2017.R1, Another was created by S32 DS 2.1. After complied, It's strange they are different.
S32 DS 2017.R1:
S32 DS 2.1:
I checked the propertity is same . Could you give me some help?
解決済! 解決策の投稿を見る。
Hi stanish,
Yes, It's caused by the compiler option
-fstrict-volatile-bitfields
Thanks very much!
Do you have the same linker file? Do you have same optimization configuration?
Yes, two projects have same link file and same optimization configuration.
Can you provide your project or reproducible code snippet? Thanks
This is the code:
void Tim_Init(void)
{
//STM_0.CR.R = 0x00003103;
STM_0.CR.B.FRZ = 1; /*0:STM counter continues to run in debug mode*/
STM_0.CHANNEL[0].CMP.R = 1000; /*matches the STM_CNT register*/
STM_0.CR.B.CPS = 0x31; /*counter prescaler */
STM_0.CR.B.TEN = 1; /*Timer counter Enabled*/
STM_0.CHANNEL[0].CCR.B.CEN = 1; /* channel 0 enable */
STM_0.CHANNEL[0].CIR.B.CIF = 1; /* clear the flag */
}
Thanks!
Hello,
it seems the difference is caused by the compiler option:
-fstrict-volatile-bitfields
this causes the bitfield struct access (peripheral register) respects the declared datatype.
See se_stw vs. se_stb instruction
In a previous version of the compiler this option was enabled by default. Later compiler versions (starting with v1.2+) this option has to be enabled expicitly in compiler options.
hope it helps.
Stan
Hi stanish,
Yes, It's caused by the compiler option
-fstrict-volatile-bitfields
Thanks very much!