Hello,
I am currently writing a kernel module that will lock cache lines for applications at context switch.
My kernel is mapped 1:1 so I lock physical addresses corresponding to data used by the application directly.
However when my application executes, all memory accesses to supposedly locked line seems to produce a cache misses.
Am I doing something wrong?
Caches are enabled and lines are correctly locked in caches (I could check that with a debug probe).
I am using a NXP MPC5777C e200z7 core.
Thanks in advance!
Hi, do you have set MMU entry with copy back mode? The same with cache control register.
An example to see how to lock the data in the cache you may find in the following appnote, section 9:
https://www.nxp.com/docs/en/application-note/AN2865.pdf
No, we use cache in WT mode.
An other issue we discovered is that the cache is only used in supervisor mode.
When we switch to User mode, the cache is never used. Only kernel mode seems to use the ICache and DCache.