How to add a core to an exisiting project? How to share RAM? MPC5748G

[pmrlcbtcphtzjdq]

ello!

I have been working on a project, and so far I have been using a single core on my MPC5748G - when creating a project I chose to use only the boot core. Now I need to move some code on to the second core and have a second instance of freeRTOS running there. I encountered two issues.

1. How to add a new core to an existing project?

I have not been able to add a new core - I have not been able to find a way to extend the existing project to use a second core. On the other hand when creating a new project (File->New->S32DS Application Project) there is an option to create a multi-core project.

To solve the problem I had the idea to create a new project, that uses only the second core and to assign its starting RAM address just above the first core project. This way I could 'flash' them onto the board together. Unfortunately, this was impossible for two reasons:

- the GUI doesn't allow only the second core to be set for the new project

- precise RAM allocation was not possible. My first project uses 200 000 bytes (0x30D40 bytes), so I tried creating a new project, and have its RAM start at 0x40030D041. This was not possible with the S32 GUI - the box with the initial RAM address is noneditable.

2. Shared RAM

Eventually, I need two cores to share some memory and exchange data. However, in the GUI settings each core has a specific RAM size and RAM starting address. Is it possible to create a chunk of memory that is shared between the cores?

Thanks a lot for your advice.

[pmrlcbtcphtzjdq]

[please delete this entry]

[jiri_kral]

Hi, 

to add second core - you need to create new project with two cores and copy your sources for core 1 into newly created project. Technically dual core project are two interdependent projects. 

Related to RAM - it is good idea to have big enough separate RAM space for each core. You can modify linker file for Core 2 to start on any address, but you may end in trouble if cores will rewrite memory for other core. You can use shared memory for data handling between cores - here is simple example: 

https://community.nxp.com/t5/S32-Design-Studio-Knowledge-Base/Example-S32R274-multi-core-shared-memo...

It is for S32R274 - but the principle is same. 

Hope it helps. 
Jiri 

[pmrlcbtcphtzjdq]

Thanks for the tips. I created a second project for the second core and followed your advice, but I still face a problem - I can't flash the new program to the second core, I get this warning:

'PE-ERROR: Warning. Can't read memory while part is running. @11d52b0 (4 bytes)'

any advice on how to fix that? I need to be able to run a piece of code on the second core.

What I did so far:

1. I found few example projects online and checked their linker_flash.ld file in Project_Settings\Linker_Files\

2. I checked that the flash and RAM settings for each core in these examples. In one of them Core Z4_0 had flash size of 1856K starting at 0x01000000 . According to the reference manual NVM memory map, the next available free memory block starts at 0x01200000 - this is exactly where core Z4_1 has its beginning. It is set as FLASH_BASE_ADDR or ' m_text : org  = ' variable.

2. Similar logic applies to RAM. To the base address of 0x40000000 for the Z4_0 core, the next cores in the example had the base set to the address of 0x40040000 (core Z4_1) and 0x40080000 (core Z2_0), as each core has 256K of RAM for its disposal.

3. I tried to apply this to my code. My application uses two cores, Z4_0 has flash of 1152K, Z4_1 flash of 1856K, and 256K RAM for each core. Therefore I set the FLASH_BASE_ADDR to 0x01140000 ( 0x1000000 [Z4_0 base] + 0x119400 [1152K Z4_0 flash size] = 0x111 9400, so the closest free flash block starts at 0x01140000), and SRAM_BASE_ADDR to 0x40040000 (similar logic as above). My current settings for the memory are listed below:

	Z4_0	Z4_1
SRAM_BASE_ADDR	0x4000000	0x40040000
FLASH_BASE_ADDR	0x01000000	0x01140000

However, the other settings for both of the cores I left the same as they were. I don't really know what they stand for. These settings are:

flash_rchw : org = 0x00FA0000, len = 0x4
cpu0_reset_vec : org = 0x00FA0000+0x10, len = 0x4
cpu1_reset_vec : org = 0x00FA0000+0x14, len = 0x4
cpu2_reset_vec : org = 0x00FA0000+0x04, len = 0x4
rappid_boot_data : org = 0x00FA0000+0x08, len = 0x8

4. After setting this up, I tried to flash the board and it failed. I tried with different debugger confiurations.

The 'USB_Multilink' Interface for the debugger settings, flashing gets stuck at 90% and freezes.

The 'OpenSDA Embedded Debug' Interface for the debugger gives a warning and fails. The warning is:

PE-ERROR: Warning. Can't read registers while part is running

PE-ERROR: Warning. Can't read memory while part is running. @11d52b0 (4 bytes)

I noted that the debugger has a problem writing to memory that is close to what I set up - I assume it is correctly interpreting the settings in linker_flash.rd.

How to solve this issue? I would be grateful for any tips.

[pmrlcbtcphtzjdq]

I am attaching the debug configurations I tried.

1. I tried USB Multilink with the default shift freq (5000 KHz) and default delay after reset (0ms)

2. I tried USB Multilink with the 3000KHz shift freq and 200ms delay

3. I tried both of the above with the advanced settings that preserve memory (I chose the preserve the first 1152K for the flash of the first core and 256K for the first cores RAM)

4. I tried USB OpenSDA with the default settings

5. I tried USB OpenSDA with the preservation of memory.

Everything fails with a similar error:

Connection from "127.0.0.1" via 127.0.0.1. Connection from port "56740" to 7226
PE-ERROR: Warning. Can't read registers while part is running.
PE-ERROR: Warning. Can't read memory while part is running. @0 (4 bytes)
PE-ERROR: Warning. Can't read memory while part is running. @0 (4 bytes)
Telnet server running on 127.0.0.1:51794
PE-ERROR: Warning. Can't read memory while part is running. @11d52b0 (4 bytes)
PE-ERROR: Warning. Can't read memory while part is running. @11d52b0 (4 bytes)
PE-ERROR: Warning. Can't read memory while part is running. @11d52b0 (4 bytes)
Interrupt command received. Halting execution.

I am attaching the screenshots of my settings

[pmrlcbtcphtzjdq]

I managed to find a workaround for the problem of flashing the second core. This solution doesn't help with flashing a single .elf file into a specific core but allows to run the desired combination of .elf files on the device.

1. click the 'run' button.

2. chose 'run configurations'.

3. set up a launch group with the desired .elf files for the cores you wish to flash. These cores need to be in the 'debug' mode, and it needs to use flash memory. run this configuration.

4. enter the debug mode and stop all the debugging.

5. unplug the device and plug it again - the program for both cores is stored now in flash memory.