Hi,
this can happen, it is application dependent. Crossbar allows concurrent access of two bus masters to different slaves. If the code is running from flash memory, data can be written/read to/from the RAM at the same time because there are separate buses for instruction and data. If the code is running from RAM, it can add some wait states when accessing data in RAM because there's conflict on crossbar. This effect can be eliminated by enabled cache memory up to certain level.
Regards,
Lukas
