Hello,
the SDK for K64 do not correctly set the FTM register SYNCONF for CTNMIN and CNTMAX loading points. According to the flowchart "40-45. MOD register synchronization" in "K64 Sub-Family Reference Manual, Rev. 3", for the software trigger must be set the bit SWRSTCNT to 0 to wait for a loading point.
But in fsl_ftm.c is the SYSCONF set for the software trigger:
if (syncMethod & FTM_SYNC_SWSYNC_MASK)
{
/* Enable needed bits for software trigger to update registers with its buffer value */
reg |= (FTM_SYNCONF_SWRSTCNT_MASK | FTM_SYNCONF_SWWRBUF_MASK | FTM_SYNCONF_SWINVC_MASK |
FTM_SYNCONF_SWSOC_MASK | FTM_SYNCONF_SWOM_MASK);
}....
base->SYNCONF = reg;
This value is not changed later when loading points are set in SYNC register in the function FTM_SetReloadPoints in fsl_ftm.c
See the attached modified example hello_world.c for the FRDM-K64F with a LED connected to the PinD0. The LED is blinking with the frequency 15 Hz and duty cycle 1%, because the register C0V is not reloaded.
When the line "FTM_SetSoftwareTrigger( FTM3, true );" is uncommented the LED is lighting continuously, because the software trigger resets the counter asynchronously (and also very often).
When the line "FTM3->SYNCONF &= ~FTM_SYNCONF_SWRSTCNT_MASK;" after FTM initialization is uncommented, the LED is correctly blinking with duty cycle 50%.
The same problem is for hardware trigger and the bit HWRSTCNT.
Best regards, reg.
Hi Reg:
When SWRSTCNT = 0, FTM updates MOD with its buffer value after waiting the next selected loading point.
When SWRSTCNT = 1, FTM updates MOD with its buffer value immediately.
Users can choose how to set SWRSTCNT bit according to their own project.
If set SWRSTCNT = 1, FTM_SetSoftwareTrigger should be out of while(1) or add delay in while(1) to wait to update PWM dutycycle
Regards
Daniel
Hi Reg:
Thank you for your feedback, I forwarded your issue to the software team. I will get it back to you when I have results
Regards
Daniel