Secure Debug Controller for LS1046A

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Secure Debug Controller for LS1046A

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Faizanbaig
Contributor IV

Hi,

I need few clarifications on Secure debug controller for LS1046A RDB and have few questions :

1) Can Secure debug be enabled without blowing fuses by just writing debug response value to mirror registers?

2)If Secure Debug controller is enabled by blowing the  fuses permanently,  Is it possible to switch  between debug levels like level 1 to Level 0 and level 0 to level 3 and so on.?

 

Any help/suggestions would be appreciated.


Thanks,
Faizan

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yipingwang
NXP TechSupport
NXP TechSupport

All the fuse are blown once bit. Once you burn a fuse bit from b'0 to a b'1, you cannot turn a fuse b'1 back to a b'0. That is why the
OEM Security Policy Register 1 (SFP_OSPR1), bit 29–31 DBLEV
000 Open: Debug portals are enabled unconditionally.
001 Conditionally closed via challenge response, without notification.
01x 01x: Conditionally closed via challenge response, with notification.
1xx 1xx: Closed. All debug portals are disabled.
instead of use decimal value 1,2,3,4.

Back to Q1, you have to blown the fuse. Burning the debug response value register just prepare the prepare for secure boot. You need to program SFP_OSPR to activate it.

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Faizanbaig
Contributor IV
Can we switch between these levels in lab environment?
Like if we enable level 3 , can we go back to level 0 again?
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yipingwang
NXP TechSupport
NXP TechSupport

No, fuse burning is permanent. They cannot switch option back and forth.

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Faizanbaig
Contributor IV
Thanks for the response..
Any Mirror registers method or temporary writes?
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yipingwang
NXP TechSupport
NXP TechSupport

No method for temporary writing.

You have to blown the fuse. Burning the debug response value register just prepare the prepare for secure boot. You need to program SFP_OSPR to activate it.

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