I am hoping to find some guidance on how to modify the RCW for my 1021a-iot system. I want to enable some GPIO for testing purposes. I just need some help on how to program the value not the values themselves. I do not have code warrior and hence no QCVS which is the only mention of how to do this I have found.
I am currently using the SD card as boot location if that makes any difference on the procedure.
Can I change the defaults inthe u-boot and have the new RCW automatically built by bitbake.
As simply as ...
bitbake -c cleansstate u-boot-ls1
bitbake -c patch u-boot-ls1
bitbake u-boot-ls1
Documents I have found so far don't seem to address this. I am pretty new still at yocto and patching etc..
Thank You
Bill Anderson
Ufedor, Thanks for the information. Unfortunately I am unable to either create a working new or recreate the orignal rcw for the LS102ia-iot using this approach. From what I have been told the ls1021a iot SDK is not fully integrated yet into Yocto. I wonder therefore if the build steps might not be different than normal. The RCW generated for sdboot is different in several areas. The values in the ls1021a.rcwi file do not seem complete for instance UART_EXT is not set. and IFC_GRP_E1_EXT = 4 which is different than the default in the iot sd rcw. I am using the Freescale-Linux-SDK-for-LS1021A-IOT-Rev2-v0.4-20150907-yocto.iso source. Any thought where I am going wrong?
Thanks
Bill
I updated the rcw_1000_sdboot.rcw file (below) to add missing and different value corrections. and got what appears to be a sane
rcw_1000_sdboot.bin file
/tmp/work/ls1021aiot-fsl-linux-gnueabi/rcw/git-r0/git/ls1021aiot/SSR_PPN_20> ls
rcw_1000.bin rcw_1000_lpuart.rcw rcw_1000_qspiboot.rcw rcw_1000.rcw rcw_1000_sben.rcw rcw_1000_sdboot.rcw rcw_1000_usb2.rcw
rcw_1000_lpuart.bin rcw_1000_qspiboot.bin rcw_1000_qspiboot_swap.bin rcw_1000_sben.bin rcw_1000_sdboot.bin rcw_1000_usb2.bin
wanderson@curly:/opt/nxp/QorIQ-SDK-V1.7/Freescale-Linux-SDK-for-LS1021A-IOT-Rev2-v0.4-20150907-yocto.iso/build_ls1021aiot_release/tmp/work/ls1021aiot-fsl-linux-gnueabi/rcw/git-r0/git/ls1021aiot/SSR_PPN_20> hexdump -x rcw_1000_sdboot.bin
0000000 55aa 55aa ee01 0001 0806 0a00 0000 0000
0000010 0000 0000 0000 0000 0020 0000 4008 0079
0000020 0260 005a 0421 0060 0000 0000 0000 0000
0000030 0000 0000 0320 0080 0220 0048 1b84 4013
0000040 0000 0000 0000 0000 5709 0002 ffff ffff
0000050 ee09 0002 1060 0000 6108 4000 c054 686d
0000060
If I proceed to rebuild u-boot using
bitbake -c cleansstate u-boot-ls1
bitbake -c clean u-boot-ls1
bitbake -c patch u-boot-ls1 2>&1 > p.out
bitbake u-boot-ls1 2>&1 > b.out
I notice the rcw directory <tmp>/deploy/images/ls1021aiot/rcw/ls1021aiot/SSR_PPN_20 contains my modified rcw_1000_sdboot.bin
but that the u-boot-ls1021aiot-2014.07-r0.bin created still has old RCW info. Did I miss a step.
Thanks again
Bill
modified ls102aiot/rcw_1000_sdboot.rcw file:
/*
* LS1021AIOT RCW for SerDes Protocol 0x20
*
* 3G configuration -- 1 RGMII + 2 SGMII
*
* Frequencies:
*
* Sys Clock: 100 MHz
* DDR_Refclock: 100 MHz
* SDREFCLK_FSEL: 100 MHz
*
* Core -- 1000 MHz (Mul 10 )
* Platform - 300 MHz (Mul 3)
* DDR -- 800 MHz (Mul 8)
* SGMII -- 125MHz
* PCIE -- 100MHz
*
* Serdes Lanes information
* A PCIe*1
* B SGMII1
* C PCIe*1
* D SGMII2
*
* Boot from SD card.
*
*/
#include <../ls1021aqds/ls1021a.rcwi>
SYS_PLL_RAT=3
MEM_PLL_RAT=8
CGA_PLL1_RAT=10
SRDS_PRTCL_S1=32
SRDS_PLL_PD_S1=1
SRDS_DIV_PEX=1
USB3_REFCLK_SEL=2
USB3_CLK_FSEL=57
A7_ACE_CLKDIV=2
A7_DBG_CLKDIV=2
HWA_CGA_M1_CLK_SEL=1
PBI_SRC=6
DP_DIV=1
OCN_DIV=1
IFC_MODE=37
/*IFC_MODE=64 Modified to match what I saw in iot factory image*/
DRAM_LAT=1
SYS_PLL_SPD=1
UART_BASE=7
IFC_GRP_E1_EXT=1
/*IFC_GRP_E1_EXT=4 orig */
EC1=4
/*EC2=2 changed to enable GPIO3[15:27]*/
EC2=1
QE-TDMA=6
QE-TDMB=6
SDHC=0
DVDD_VSEL=2
LVDD_VSEL=1
EVDD_VSEL=2
BVDD_VSEL=2
/* ADD */
UART_EXT=4
IFC_GRP_A_EXT=1
IFC_GRP_F_EXT=1
IFC_GRP_G_EXT=1
#include <../ls1021aqds/scfg_bit_reverse.rcw>
#include <../ls1021aqds/uboot_address.rcw>
~
The above exercise was very useful in learning how to generate the desired RCW but additional steps are required to incorporate the bits. I have found that the LS1021a-iot SDK uses a different approach to integrate the RCW, When I finally dissected the u-boot RCW recipe enough to see that in the u-boot <S> directory
which on my system
.../build_ls1021aiot_release/tmp/work/ls1021aiot-fsl-linux-gnueabi/u-boot-ls1/2014.07-r0/git
there is a patch generated file named
board/freescale/ls1021aiot/ls102xa_rcw_sd.cfg
which contains the RCW that u-boot build will use. This needs to be modified or you will continue to use factory defaults
I did a clean
bitbake -c cleansstate u-boot-ls1
bitbake -c clean u-boot-ls1
bitbake -c patch u-boot-ls1
I then modified the newly generated board/freescale/ls1021aiot/ls102xa_rcw_sd.cfg file to match my desired config
and finally I did the build
bitbake u-boot-ls1
Now if anyone can tell me how I can automate this change it would much appreciated. I assume I have to do some sort of post patch repatch.
Thanks
Bill
There are two ways to create/modify RCW.
1) By means of the Yocto Linux SDK
To extract the RCW source code, do the following:
$ bitbake -c cleansstate rcw
$ bitbake -c patch rcw
$ cd <S>
Note: Use bitbake -e rcw | grep ^S= to get the value of <S>.
Modify the default RCW according to the design needs.
To rebuild the RCW package:
$ bitbake rcw
Additional information could be found in the SDK Documentation at:
https://freescale.sdlproducts.com/LiveContent/web/pub.xql?c=t&action=home&pub=QorIQ_SDK&lang=en-US
2) By means of the CodeWarrior Configuration and Validation Suite as an integral part of the CodeWarrior Development Suites for Networked Applications.
Download evaluation version here:
NOTE: No license is needed to run the QCVS PBL Tool, so evaluation version is OK.
The RCW could be generated using the PreBootLoader Configuration Tool (PBL) of the CodeWarrior QorIQ Configuration and Validation Suite (QCVS):
http://cache.freescale.com/files/soft_dev_tools/doc/user_guide/QCVS_PBL_User_Guide.pdf