Hi community,
This post echoes this one which already gave a lot of answer: https://community.nxp.com/t5/Layerscape/LS1046A-can-not-detect-USB-device-on-u-boot/m-p/1561319#M114...
The issue:
We have a LS1046A based board, it includes one USB 2.0 plug on which we try to connect a USB stick, without success so far.
After investigating it seems that the USB_DRVVBUS signal never goes high, thus preventing the 5V (USB_VCC) from reaching the USB stick. Messing around with the RCW we managed to set this signal as GPIO and to force it up which brought the 5V to the USB plug, thus validating the "usb power circuitry" on U15, but still no device is detected regardless if it's powered or not.
Schematic for USB plug side:
Schematic for LS1046A side :
Details about the setup:
Some questions:
For the rest we are running out of juice in finding consistant leads, any help much appreciated, I can also update the setup details upon request should there need more informations.
Thanks in advance !
USBx_PWRFAULT,USB_DRVVBUS,USBx_PWRFAULT.
Check the three signal include rcw config and checklist requirment.
Checking the schematics, USBx_RX_P and USBx_RX_M should be grounded. I enclosed the design check-list for LS1046A. Check the Table 4 for USB power supply filter circuits.
I do not know what could be the cause "My software guy had to remove erratum_a009007 inside the soc.c (from uboot or the linux distro, not sure about that one) system wouldn't boot otherwise.". From the Dermiste_3, all USB power is connected. Can you confirm all these USB supplies are powered up when A-009007 workaround is implemented. Having said that, you do not need A-009007 as USB 3.0 is not implemented on your system.
Yes, you can debug this issue entirely under uboot. Actually, it is easier to do it under uboot.
As long as all the 3 USB power supplies are provided, the USB core should be properly powered. The USB clock can use either single ended or differential clock Sysclock. However, it has to be 100 MHz.
You can use a USB protocol analyzer to see whether any actions or packets are sent out and what wrong information is on the line. However, you need to get USB power and clock correct first.
Yes I am aware that RX_P & RX_M should be grounded, which is not implemented on my schematic.
I can confirm that the USB power goes up within 17ms after CPU_VDD goes up, I assume that when soc.c is executed USB cores are therefore powered.
I am not sure however if the USB core is not damaged and at this point I'm interested in seeing how I can debug this from uboot, if the core is damanged or not powered it means I won't be able to write any register linked to USB PHY, correct? Writting reg using rw should therefore not work?