My PHY (Broadcom BCM84891L) supports 2500X, but not 2.5G SGMII. Is it possible to connect the LS1046A to that PHY?
I tried it, and here is what I got.
I'm working with SerDes protocol 0x2233 and I use MAC9. Autonegotiation is switched off in MDIO Register SGMII_IF_MODE. I also obeyed the initialization as required by LS1046ARM, Rev.3, section 31.8.1.2 ("2.5G SGMII").
My status is:
Solved! Go to Solution.
Meanwhile I solved the problem.The problem was the Ethernet preamble.
Ethernet frames are preceded with a 7 byte preamble (all 0x55) and a 1 byte Start Frame Delimiter (SFD, 0xd5). For 1000Base-X (and maybe other cases) the preamble is allowed to be only 6 bytes in length. AFAIK it is shortened to support 16-bit alignment on the PCS level. The 2500Base-X standard does NOT allow such "short" preambles.
Now 2.5G SGMII seems to be "fast SGMII", which means that the MAC believes it is ok to shorten the preamble. However, 2500Base-X does not allow short preambles. In my case some packets had 7 bytes and some had 6 bytes, and the packets with short preambles got lost. They were transmitted over the Ethernet cable, received by the "other" PHY, but then dropped (probably by the MAC, but I'm unsure). I also found a few receivers which accepted the packets with short preambles.
The packets with 7 bytes preamble were always transmitted and received successfully.
To sum it up: 2500Base-X follows the 10G rules and disallows short preambles. 2.5G SGMII is a "fast SGMII", thus follows the 1G rules and allows for short preambles.
The Aquantia AQR109 PHY "fixes" the problem somehow. The MAC still sends short preambles (in 2.5G SGMII mode), but things work fine with the AQR109. So it depends on the PHY.
The Broadcom PHYs BCM54991EL, BCM54991L and BCM84891L have a hidden register. If a magic value is written to that register, these PHYs also "fix" the problem. CAUTION: This is not documented and not officially supported: Write 0x0c00 to 0xc6e2. Don't forget to switch to the MAC side registers in advance (this is documented).
Meanwhile I solved the problem.The problem was the Ethernet preamble.
Ethernet frames are preceded with a 7 byte preamble (all 0x55) and a 1 byte Start Frame Delimiter (SFD, 0xd5). For 1000Base-X (and maybe other cases) the preamble is allowed to be only 6 bytes in length. AFAIK it is shortened to support 16-bit alignment on the PCS level. The 2500Base-X standard does NOT allow such "short" preambles.
Now 2.5G SGMII seems to be "fast SGMII", which means that the MAC believes it is ok to shorten the preamble. However, 2500Base-X does not allow short preambles. In my case some packets had 7 bytes and some had 6 bytes, and the packets with short preambles got lost. They were transmitted over the Ethernet cable, received by the "other" PHY, but then dropped (probably by the MAC, but I'm unsure). I also found a few receivers which accepted the packets with short preambles.
The packets with 7 bytes preamble were always transmitted and received successfully.
To sum it up: 2500Base-X follows the 10G rules and disallows short preambles. 2.5G SGMII is a "fast SGMII", thus follows the 1G rules and allows for short preambles.
The Aquantia AQR109 PHY "fixes" the problem somehow. The MAC still sends short preambles (in 2.5G SGMII mode), but things work fine with the AQR109. So it depends on the PHY.
The Broadcom PHYs BCM54991EL, BCM54991L and BCM84891L have a hidden register. If a magic value is written to that register, these PHYs also "fix" the problem. CAUTION: This is not documented and not officially supported: Write 0x0c00 to 0xc6e2. Don't forget to switch to the MAC side registers in advance (this is documented).
Okay, thanks for the answer.
I thought that 2500Base-X is the same as 2.5G SGMII with autonegotiation disabled. Seemingly I was wrong. Can you shortly explain what's the difference between the two and why they aren't compatible?
As far as I remember I used the MAC-Register IF_MODE, and there the fiel ENA (ENable Autonegotiation). The register is documented in the QorIQ LS1046A DPAA Reference Manual (I use Rev. 0), Chapter 6.4.3.3.1 "Interface Mode Register (IF_MODE)".
2500Base-X seems not to be defined by any standard. Probably it is 1000Base-X, but over-clocked.
1000Base-X in turn denotes a family of 1000 Mb/s Physical Layer implementations, including 1000Base-CX (short-haul copper). This is defined in the "IEEE Standard for Ethernet", Section three. I guess that my PHY really operates 2500Base-CX.
SGMII leverages the PCS used by 1000Base-X (see SGMII specification, ENG-46158, rev. 1.8) and thus uses the same encoding (8b/10b). 2.5G SGMII is not defined anywhere, but seems to be over-clocked SGMII.
I believe that 2.5G SGMII relates to 2500Base-X like SGMII relates to 1000Base-X. It that is true, the main difference is the meaning of the control word bits (a.k.a. auto-negotiation). If I disable autoneg on both sides, the whole thing should work. Note that my setup is almost working (RX ok, TX unstable), which indicates that 2500Base-X and 2.5G SGMII are very similar.
Question: If I disable autoneg within LS1046A, the SoC will not send any control word, right?
It will not send any control word for auto-negotiation
Thanks for the information. The -X at the end did make me think about fiber, but I have not worked on 2500BASE-X so I wasn't sure. Too many Ethernet interfaces options and varied possibilities within them make things confusing these days.
Good question and even I have been wondering if 2500BASE-X is the same as SGMII 2.5G. In fact, I assumed that to be the case since there is no other information/clarity on this interface. I am following this topic to learn more.
There's an interesting topic here, but I still don't understand it completely.
This topic contradicts the opinions discussed above: https://community.nxp.com/t5/S32G/Can-SGMII-2-5G-be-connected-to-2500Base-X/td-p/1503809
unfortunately you can't connect that PHY configured as you want, because is not supported by the MPU LS1046A.