LPC 1227 - i can set interrupt priority?

[lpcware]

Content originally posted in LPCWare by lsbach_plum on Mon May 07 02:25:06 MST 2012
Hey,

Is it possible to set priorities for interrupts?

I support two interrupts: GPIO, and Timer. I want that when you capture GPIO interrupt timer interrupt is finished. Is there a registry responsible for the priorities?

[lpcware]

Content originally posted in LPCWare by Ex-Zero on Mon May 07 04:24:42 MST 2012
UM10441 describes a CMSIS (and CM[B][COLOR=Red]I[/COLOR][/B]SIS  :)) function to set 4 priority levels:

---

Quote:

Table 377. CM[COLOR=Red][B]I[/B][/COLOR]SIS access NVIC functions
void [B][COLOR=Red]NVIC_SetPriority[/COLOR][/B](IRQn_Type IRQn, uint32_t priority)

25.5.2 Nested Vectored Interrupt Controller
This section describes the Nested Vectored Interrupt Controller (NVIC) and the
registers it uses. The NVIC supports:
• 32 interrupts.
• [B][COLOR=Red]A programmable priority level of 0-3 for each interrupt. A higher level corresponds to a lower priority, so level 0 is the highest interrupt priority.[/COLOR][/B]
• Level and pulse detection of interrupt signals.
• Interrupt tail-chaining.
• An external Non-maskable interrupt (NMI).

---

So what's not clear there :confused: