streaming data over high speed USB

[lpcware]

Content originally posted in LPCWare by equinox on Thu Apr 05 11:18:56 MST 2012
I want to use a LPC4330FET100 to stream around 100 Mbit / sec of video data from my FPGA through the LPC4330 over the high speed USB controller.

I essentially want to use the LPC4330 as a bridge between my FPGA and high speed USB host.
The data I want to send is streaming video.

What is the easiest way to do this?

I assume I need to use some interface with sufficient bandwidth on the LPC4330, such as the external memory controller or maybe the SD card controller. Then I guess I could use a DMA controller to pull data from my FPGA and shove it into the USB controller.

Does the sound feasible? Which interface on the LPC4330 is simple, yet has enough I/O bandwidth to pull 100 Mbit / sec
through it? SPIFI maybe?

[lpcware]

Content originally posted in LPCWare by ccrome on Fri Apr 27 07:54:06 MST 2012
Hi there,
  I'm working on a similar problem (though not video).  My difficulty is on the USB side - have you had any success with streaming high-speed data over USB?

As for pulling data from your FPGA, that sounds do-able with a couple number of interfaces.  I don't know much about SPIFI, but I suspect it's more complex to use than either SSP or SPI. 

The data sheet, in section 7.18.4.1 says, 'Maximum SSP speed of <tbd> Mbits/sec'  :-(   But, there is a 'typical' clock cycle time in section 11.8 of 40ns.  Shoot, That's only 25 Mbit/sec.  You might get lucky and the spec may come out much faster once finalized, but I wouldn't hold my breath.

SPIFI may be usable, but it appears to have a read/write architecture, as opposed to just streaming.  Bandwidth seems sufficient:  40MB/sec = 320 Mbit/sec

The external memory interface may be easiest:  just connect to the memory bus.  But that may be challenging if you're using external memory already, but bandwidth should be good enough.  Since there are multiple chip-select outputs, you can simply ignore the address bus all together and use the CS pin to enable your streaming video.

Another option would be SD/MMC interface.  It's typical frequency is listed as 40MHz, and you can have 1, 4 or 8 data lines IIRC  That's a theoretical bandwith of up to 320Mbit/sec. 

Anyway, good luck, and if you have any luck with USB, I'd love a reply :-)

-Caleb

[lpcware]

Content originally posted in LPCWare by JohnR on Sat Apr 14 04:45:32 MST 2012
I have also struggled to understand the operation of the SGPIO as I would really like to use it to collect data from an ADC either in parallel or SPI mode.

The NXP guy in the video that covers the SGPIO mentioned (IIRC) that there was code for the camera adapter example but I heve not been able to find it.

The SGPIO_UsbAudio example would be a lot more useful with a better description and maybe a flow diagram to show how it works.

JohnR

[lpcware]

Content originally posted in LPCWare by equinox on Fri Apr 13 08:03:19 MST 2012
Do I have to dedicate one of my processor cores to reading from the SGPIO?
It does not seem that the GPDMA is connected to the SGPIO.

There is a "camera interface example" in section 18.8.2 page 311 of the Preliminary user manual
(document# UM10503) that shows camera data, sync signals, and clock going into the SGPIO.
There is a paragraph on page 313 which says,

"Data is captured at a falling PIXCLK when HSYNC is low. At a POS interrupt 32 data
words are read from REG_SS and written to the data SRAM. Then SGPIO15 is toggled to
request a GP-DMA transfer of 32 words from the data SRAM to the final destination.
When DIN per line (or frame) is not a multiple of 32 data words then software should read
at the end of a line (or frame) the POS counter to determine whether all data has been
captured in REG."

How does the SGPIO data get into SRAM?
Is there a document or reference design example that shows how to do this in further detail?

Thanks!

[lpcware]

Content originally posted in LPCWare by usb10185 on Thu Apr 12 09:35:00 MST 2012
You should consider using the SGPIO otherwise the EMC is a good option.

[lpcware]

Content originally posted in LPCWare by equinox on Fri Apr 06 08:30:19 MST 2012
I just wanted to clarify my question.

I can cause my FPGA to look like SDRAM, SRAM, FLASH, SDCARD, SPIFI, etc to the LPC4330 microcontroller.
I want to know which of the microcontroller's various interfaces would be easiest to use in order to get the data out of my FPGA and send it out across the HS USB interface. Right now I am thinking the SPIFI controller might be the simplest. It has sufficiently high bandwidth ("data at rates of up to 40 MB per second") and relatively simple interfacing in comparison to the EMC stuff. Also it is connected to the DMA controller. So hopefully I can DMA data from the FPGA and shove it across the HS USB with little overhead.