periph_SCT_match_toggle example has bogus code - AN11538

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periph_SCT_match_toggle example has bogus code - AN11538

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lpcware
NXP Employee
NXP Employee
Content originally posted in LPCWare by larryvc on Fri Dec 05 12:41:57 MST 2014
The periph_SCT_match_toggle example in nxp_lpcxpresso_824_SCT_PWM_examples in AN11538  Rev. 3 — 3 November 2014 has unneeded, and incorrect, code.  Was this added to see if anybody would notice?  

/*****************************************************************************
*  LPC82x Match Toggle for the LPC824 LPCXpresso board
*
*  1. Use SCT timer to generate a 50 msec clock output @ CTOUT_0
*  2. CTOUT_0 is linked to P0_12 (toggles every 50 msec)
*****************************************************************************/
#include "board.h"

#define match_value (10000)

extern void sct_fsm_init (void);

void sct_fsm_init (void)
{

Chip_SCT_Init(LPC_SCT);                            /* enable the SCT clock     */

Chip_SCT_Config(LPC_SCT,  SCT_CONFIG_AUTOLIMIT_L ); /* SPLIT */


Chip_SCT_SetControl(LPC_SCT, SCT_CTRL_PRE_L(119));     /* set prescaler, SCT clock = 1 MHz   */



Chip_SCT_SetMatchCount(LPC_SCT, SCT_MATCH_0, match_value);// match 0 @ 10 Hz = 100 msec
Chip_SCT_SetMatchReload(LPC_SCT, SCT_MATCH_0, match_value);

/* OUTPUT registers */

Chip_SCT_SetOutput(LPC_SCT, SCT_OUTPUT_0, SCT_EVT_0 );               // event 0 will set SCT_OUT_0
Chip_SCT_ClearOutput(LPC_SCT, SCT_OUTPUT_0, SCT_EVT_0);                       // event 0 will clear SCT_OUT_0


/* Conflict resolution register */
Chip_SCT_SetConflictResolution(LPC_SCT, 0, SCT_RES_TOGGLE_OUTPUT);            // output 0 toggles on conflict


/* EVENT registers */

Chip_SCT_EventState(LPC_SCT, SCT_EVENT_0, ENABLE_STATE0);            // event 0 only happens in state 0
Chip_SCT_EventControl(LPC_SCT, SCT_EVENT_0, (CHIP_SCT_EVENTCTRL_T)  ( SCT_EVECTRL_MATCH0|   // MATCHSEL[3:0]   = related to match 0
                                                                          SCT_COMBMODE_MATCH));  // COMBMODE[13:12] = match condition only



Chip_SCT_ClearControl(LPC_SCT , SCT_CTRL_HALT_L);

}


int main(void)
{
/* Generic Initialization */

SystemCoreClockUpdate();
Board_Init();

Chip_Clock_SetSysClockDiv(5);

Chip_Clock_EnablePeriphClock(SYSCTL_CLOCK_IOCON);// enable clock for IOCON

Chip_SWM_Init();

Chip_SWM_MovablePinAssign(SWM_SCT_OUT0_O, 12);

// Bogus code for this example, SCT1 is not used and P2_17 does not exist
// modefunc value passed for P0_12 is bogus, assigns values to reserved bits
// Great example of copy/paste without verification
//Chip_IOCON_PinMuxSet(LPC_IOCON, 12 , 0x00000081);// P2_17 is SCT1_OUT1

sct_fsm_init();                      /* Initialize the SCT using the code generated by Red State */


    while(1)
    {
        __WFI();
    }
}
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lpcware
NXP Employee
NXP Employee
Content originally posted in LPCWare by mc on Fri Dec 05 18:05:00 MST 2014
Hi Larryvc,
Thanks for pointing out. We will correct it. Yes, LPC824 does not have port2.
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